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De Francesco" To: linux-cxl@vger.kernel.org Cc: David Hildenbrand , Oscar Salvador , Greg Kroah-Hartman , "Rafael J . Wysocki" , Danilo Krummrich , Davidlohr Bueso , Jonathan Cameron , Dave Jiang , Alison Schofield , Vishal Verma , Ira Weiny , Li Ming , Bjorn Helgaas , Mahesh J Salgaonkar , Oliver O'Halloran , Andrew Morton , Lorenzo Stoakes , "Liam R . Howlett" , Vlastimil Babka , Mike Rapoport , Suren Baghdasaryan , Michal Hocko , linux-kernel@vger.kernel.org, linux-mm@kvack.org, driver-core@lists.linux.dev, linux-pci@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, "Fabio M. De Francesco" Subject: [PATCH v2 01/13] cxl/pci: Make the HDM and Mem_Enable writes callable from CXL Date: Tue, 25 Aug 2026 04:26:16 +0200 Message-ID: <20260825022628.3651434-2-fabio.m.de.francesco@linux.intel.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260825022628.3651434-1-fabio.m.de.francesco@linux.intel.com> References: <20260825022628.3651434-1-fabio.m.de.francesco@linux.intel.com> Precedence: bulk X-Mailing-List: driver-core@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Split the Global Control write out of devm_cxl_enable_hdm() as cxl_enable_hdm() and drop the static from cxl_set_mem_enable(), so both are reachable from the rest of cxl_core. Declare them in core.h. Signed-off-by: Fabio M. De Francesco --- drivers/cxl/core/core.h | 2 ++ drivers/cxl/core/pci.c | 19 ++++++++++++++----- 2 files changed, 16 insertions(+), 5 deletions(-) diff --git a/drivers/cxl/core/core.h b/drivers/cxl/core/core.h index 07555ae63859..4dc324f019ab 100644 --- a/drivers/cxl/core/core.h +++ b/drivers/cxl/core/core.h @@ -213,6 +213,8 @@ int cxl_gpf_port_setup(struct cxl_dport *dport); struct cxl_hdm; int cxl_hdm_decode_init(struct cxl_dev_state *cxlds, struct cxl_hdm *cxlhdm, struct cxl_endpoint_dvsec_info *info); +void cxl_enable_hdm(struct cxl_hdm *cxlhdm, u32 global_ctrl); +int cxl_set_mem_enable(struct cxl_dev_state *cxlds, u16 val); int cxl_port_get_possible_dports(struct cxl_port *port); #ifdef CONFIG_CXL_FEATURES diff --git a/drivers/cxl/core/pci.c b/drivers/cxl/core/pci.c index e4338fd7e01b..a7a2b84293e9 100644 --- a/drivers/cxl/core/pci.c +++ b/drivers/cxl/core/pci.c @@ -179,7 +179,7 @@ int cxl_await_media_ready(struct cxl_dev_state *cxlds) } EXPORT_SYMBOL_NS_GPL(cxl_await_media_ready, "CXL"); -static int cxl_set_mem_enable(struct cxl_dev_state *cxlds, u16 val) +int cxl_set_mem_enable(struct cxl_dev_state *cxlds, u16 val) { struct pci_dev *pdev = to_pci_dev(cxlds->dev); int d = cxlds->cxl_dvsec; @@ -247,14 +247,23 @@ static void disable_hdm(void *_cxlhdm) hdm + CXL_HDM_DECODER_CTRL_OFFSET); } -static int devm_cxl_enable_hdm(struct device *host, struct cxl_hdm *cxlhdm) +/* + * @global_ctrl is the CXL HDM Decoder Global Control value to enable decode in. + * A caller restoring decode after a reset passes the value it saved, so the + * fields the driver does not model are not left at their reset defaults. + */ +void cxl_enable_hdm(struct cxl_hdm *cxlhdm, u32 global_ctrl) { void __iomem *hdm = cxlhdm->regs.hdm_decoder; - u32 global_ctrl; - global_ctrl = readl(hdm + CXL_HDM_DECODER_CTRL_OFFSET); writel(global_ctrl | CXL_HDM_DECODER_ENABLE, hdm + CXL_HDM_DECODER_CTRL_OFFSET); +} + +static int devm_cxl_enable_hdm(struct device *host, struct cxl_hdm *cxlhdm, + u32 global_ctrl) +{ + cxl_enable_hdm(cxlhdm, global_ctrl); return devm_add_action_or_reset(host, disable_hdm, cxlhdm); } @@ -398,7 +407,7 @@ int cxl_hdm_decode_init(struct cxl_dev_state *cxlds, struct cxl_hdm *cxlhdm, * enable and use the HDM Decoder Capability registers. */ if (!info->mem_enabled) { - rc = devm_cxl_enable_hdm(&port->dev, cxlhdm); + rc = devm_cxl_enable_hdm(&port->dev, cxlhdm, global_ctrl); if (rc) return rc; -- 2.55.0