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[159.2.239.150]) by smtp.gmail.com with ESMTPSA id af79cd13be357-940479fc830sm24750685a.21.2026.10.23.07.01.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 23 Oct 2026 07:01:07 -0700 (PDT) Received: from jgg by wakko with local (Exim 4.97) (envelope-from ) id 1xKFpT-0000000Ghww-1SWZ; Fri, 23 Oct 2026 11:01:07 -0300 Date: Fri, 23 Oct 2026 11:01:07 -0300 From: Jason Gunthorpe To: Luigi Rizzo Cc: "David Hildenbrand (Arm)" , Luigi Rizzo , Joerg Roedel , Will Deacon , Robin Murphy , Christoph Hellwig , Marek Szyprowski , Andrew Morton , Vlastimil Babka , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Greg Kroah-Hartman , "Rafael J . Wysocki" , Danilo Krummrich , Jonathan Corbet , Jesper Dangaard Brouer , Ilias Apalodimas , Willem de Bruijn , Kuniyuki Iwashima , Joshua Washington , Harshitha Ramamurthy , Saeed Mahameed , Tariq Toukan , Tony Nguyen , Przemek Kitszel , Alexander Lobakin , Michael Chan , Pavan Chebbi , iommu@lists.linux.dev, netdev@vger.kernel.org, linux-mm@kvack.org, driver-core@lists.linux.dev, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [RFC: DMA_PMD 00/22] DMA_PMD: PMD_SIZE-backed IO buffer pools Message-ID: <20261023140107.GC3977851@ziepe.ca> References: <20261003212241.3432303-1-lrizzo@google.com> <0cc1cac1-a500-489b-9c1b-b49598b5550b@kernel.org> <20261022201229.GH3381610@ziepe.ca> X-Mailing-List: driver-core@lists.linux.dev List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: On Thu, Oct 22, 2026 at 11:51:40PM +0200, Luigi Rizzo wrote: > On Thu, Oct 22, 2026 at 10:12 PM Jason Gunthorpe wrote: > > > > On Sat, Oct 17, 2026 at 07:11:28PM +0200, Luigi Rizzo wrote: > > > > We should probably just find a way to describe that this is a POOL that focuses > > > > on physical contiguity in some configured granularity. > > > > > > Before embarking in a global renaming, I would like to get opinions on > > > acceptable alternative names (possibly with a short prefix usable for > > > identifiers in the code). I could think of the following > > > > > > DMA_PMAP (for PreMapped or Persistent Mapped) > > > or, ahemm... > > > DMA_PISA (Pooled IOMMU Superpage Allocator) > > > both using dmap_ for internal name prefixes > > > > Can someone explain what outside netdev would use this? And why you > > couldn't do this in the netdev page pool? > > I can try. > > Regarding users, the next target is disks (not included in this series) Disks don't use a memory pool, they do IO to folios allocated by the page cache. The only other candiates I know of besides page pool would be the existing dma pool users. I don't think they are so performance sensitive as netdev. IOW I think this entire series is only useful to netdev. > > It is not a common workload to have the DMA allocator be the one that > > allocates the memory. Usually we are DMA'ing from memory that was > > allocated someplace else. > > Aside from the fact that dma_alloc_attr()/dma_alloc_coherent() > does memory allocation + iova allocation/mapping, > this is not what happens here. > Maybe the confusion comes from one function name > (dma_map_alloc_pages()), but it doesn't map any thing. > My code (in this version, and more in the upcoming release) > mainly implements a specialized memory allocator with an > API equivalent to alloc_pages() and variants, but ensures that > the order-N blocks come from contiguous 2MB blocks reserved on the fly. > > The physical addresses of these blocks are recognized by the > "dma allocator" (I suppose you meant the entity that allocates the IOVA range) > so that it can apply specialized IOMMU mappings backed by 2MB IOMMU leaves. Why? This seems completely divergent from how anything else works in DMA mapping, and I don't see a reason for it to be anything like this. Other than it makes page pool work a bit easier Frankly this looks like you had AI to transpose a bunch netdev page pool into iommu. > Note that just feeding the pagepool with 2MB pages is not efficient because > the fragmentation in pagepool is done with a bump > allocator, so recycling blocks from a 2MB page is difficult > (it has to wait until all 512 blocks to become idle). My code > has a bitmap to track usage, so it naturally recycles at the block level. It doesn't seem like this little issue should motivate all this > Then there is the transmit path. > > For skb heads, one simple solution is to use tx head bounce buffers > some of the patches in the series show that option (the next version > implements a proper tx-copybreak). > Otherwise we need to populate skb heads with pre-mapped > memory. In the next version I have a simple modification to > the slub code to accept an opt-in alternative to alloc_pages(). > I considered using the pagepool, but the changes would be > similar and the layering seemed really odd, with a cache on top > of a cache. With AI there is no limit to the layering violations one can make :( > For transmit, there is a bit of impedance mismatch as well: > skb_page_frag_refill() does not know which device > we want to use (in fact, it is a per-task so there may be > many netdevs used by a task). We could tweak the pagepool > to be device-agnostic, but that would be a bit more > intrusive (more architecturally than in terms of code); > also we need to make sure dma_map() on those pages does the right thing > without trying to map/unmap the individual 4K fragments, > and we need to make sure the skb_free() etc does > not leak those pages into free_pages(). This is all a page pool problem, has nothing to do with iommu or the common dma layer. You can already get optimally mapped 2M IOVA and memory out of the APIs we have. I can see no justification for the intrustive mess under this beyond it makes netdev page pool easier to hack on top. Every thing you listed boils down to 'netdev page pool work the way I want' Jason