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This makes it difficult to safely initialize the memory > before handing it over to the hardware. > > Introduce dma::CoherentInit, a type that encapsulates a dma::Coherent > before its DMA address is exposed to the device. dma::CoherentInit can > guarantee exclusive access to the inner dma::Coherent and implement > Deref and DerefMut. > > Once the memory is properly initialized, dma::CoherentInit can be > converted into a regular dma::Coherent. > > Signed-off-by: Danilo Krummrich > --- > rust/kernel/dma.rs | 153 ++++++++++++++++++++++++++++++++++++++++++++- > 1 file changed, 152 insertions(+), 1 deletion(-) > > diff --git a/rust/kernel/dma.rs b/rust/kernel/dma.rs > index 291fdea3b52b..79dd8717ac47 100644 > --- a/rust/kernel/dma.rs > +++ b/rust/kernel/dma.rs > @@ -20,7 +20,13 @@ > FromBytes, // > }, // > }; > -use core::ptr::NonNull; > +use core::{ > + ops::{ > + Deref, > + DerefMut, // > + }, > + ptr::NonNull, // > +}; > =20 > /// DMA address type. > /// > @@ -352,6 +358,151 @@ fn from(direction: DataDirection) -> Self { > } > } > =20 > +/// Initializer type for [`Coherent`]. > +/// > +/// A [`Coherent`] object can't provide access to its memory as (mutable= ) slice safely, since it > +/// can't fulfill the requirements for creating a slice. For instance, i= t is not valid to have a > +/// (mutable) slice to of the memory of a [`Coherent`] while the memory = might be accessed by a > +/// device. > +/// > +/// In contrast, this initializer type is able to fulfill the requiremen= ts to safely obtain a > +/// (mutable) slice, as it neither provides access to the DMA address of= the embedded [`Coherent`], > +/// nor can it be used with the DMA projection accessors. > +/// > +/// Once initialized, this type can be converted to a regular [`Coherent= `] object. > +/// > +/// # Examples > +/// > +/// `CoherentInit`: > +/// > +/// ``` > +/// # use kernel::device::{ > +/// # Bound, > +/// # Device, > +/// # }; > +/// use kernel::dma::{attrs::*, > +/// Coherent, > +/// CoherentInit, > +/// }; > +/// > +/// # fn test(dev: &Device) -> Result { > +/// let mut dmem: CoherentInit =3D > +/// CoherentInit::zeroed_with_attrs(dev, GFP_KERNEL, DMA_ATTR_NO_WAR= N)?; > +/// *dmem =3D 42; > +/// let dmem: Coherent =3D dmem.into(); > +/// # Ok::<(), Error>(()) } > +/// ``` > +/// > +/// `CoherentInit<[T]>`: > +/// > +/// > +/// ``` > +/// # use kernel::device::{ > +/// # Bound, > +/// # Device, > +/// # }; > +/// use kernel::dma::{attrs::*, > +/// Coherent, > +/// CoherentInit, > +/// }; > +/// > +/// # fn test(dev: &Device) -> Result { > +/// let mut dmem: CoherentInit<[u64]> =3D > +/// CoherentInit::zeroed_slice_with_attrs(dev, 4, GFP_KERNEL, DMA_AT= TR_NO_WARN)?; > +/// dmem.fill(42); > +/// let dmem: Coherent<[u64]> =3D dmem.into(); > +/// # Ok::<(), Error>(()) } > +/// ``` > +pub struct CoherentInit(Coh= erent); > + > +impl CoherentInit<[T]> { > + /// Initializer variant of [`Coherent::zeroed_slice_with_attrs`]. > + pub fn zeroed_slice_with_attrs( > + dev: &device::Device, > + count: usize, > + gfp_flags: kernel::alloc::Flags, > + dma_attrs: Attrs, > + ) -> Result { > + Coherent::zeroed_slice_with_attrs(dev, count, gfp_flags, dma_att= rs).map(Self) > + } > + > + /// Same as [CoherentInit::zeroed_slice_with_attrs], but with `dma::= Attrs(0)`. > + pub fn zeroed_slice( > + dev: &device::Device, > + count: usize, > + gfp_flags: kernel::alloc::Flags, > + ) -> Result { > + Self::zeroed_slice_with_attrs(dev, count, gfp_flags, Attrs(0)) > + } > + > + /// Initializes the element at `i` using the given initializer. > + /// > + /// Returns `EINVAL` if `i` is out of bounds. > + pub fn init_at(&mut self, i: usize, init: impl Init) -> Res= ult > + where > + Error: From, > + { > + if i >=3D self.0.len() { > + return Err(EINVAL); > + } > + > + let ptr =3D core::ptr::from_mut(&mut self[i]); > + > + // SAFETY: > + // - `ptr` is valid, properly aligned, and within this allocatio= n. > + // - `T: AsBytes + FromBytes` guarantees all bit patterns are va= lid, so partial writes on > + // error cannot leave the element in an invalid state. > + // - The DMA address has not been exposed yet, so there is no co= ncurrent device access. > + unsafe { init.__init(ptr)? }; > + > + Ok(()) > + } > +} > + > +impl CoherentInit { > + /// Same as [`CoherentInit::zeroed_slice_with_attrs`], but for a sin= gle element. > + pub fn zeroed_with_attrs( > + dev: &device::Device, > + gfp_flags: kernel::alloc::Flags, > + dma_attrs: Attrs, > + ) -> Result { > + Coherent::zeroed_with_attrs(dev, gfp_flags, dma_attrs).map(Self) > + } > + > + /// Same as [`CoherentInit::zeroed_slice`], but for a single element= . > + pub fn zeroed(dev: &device::Device, gfp_flags: kernel::alloc:= :Flags) -> Result { > + Self::zeroed_with_attrs(dev, gfp_flags, Attrs(0)) > + } > +} > + > +impl Deref for CoherentInit= { > + type Target =3D T; > + The deref impls should be `#[inline]`. Some other methods could be as well. Best, Gary > + fn deref(&self) -> &Self::Target { > + // SAFETY: > + // - We have not exposed the DMA address yet, so there can't be = any concurrent access by a > + // device. > + // - We have exclusive access to `self.0`. > + unsafe { self.0.as_ref() } > + } > +} > + > +impl DerefMut for CoherentI= nit { > + fn deref_mut(&mut self) -> &mut Self::Target { > + // SAFETY: > + // - We have not exposed the DMA address yet, so there can't be = any concurrent access by a > + // device. > + // - We have exclusive access to `self.0`. > + unsafe { self.0.as_mut() } > + } > +} > + > +impl From> = for Coherent { > + fn from(value: CoherentInit) -> Self { > + value.0 > + } > +} > + > /// An abstraction of the `dma_alloc_coherent` API. > /// > /// This is an abstraction around the `dma_alloc_coherent` API which is = used to allocate and map