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charset=UTF-8 Date: Thu, 07 May 2026 11:38:37 +0200 Message-Id: Subject: Re: [PATCH 0/6] rust: drm: Higher-Ranked Lifetime private data Cc: , , , , , , , , , , , , , , , , , , , To: From: "Danilo Krummrich" References: <20260506221027.858481-1-dakr@kernel.org> In-Reply-To: <20260506221027.858481-1-dakr@kernel.org> On Thu May 7, 2026 at 12:05 AM CEST, Danilo Krummrich wrote: > Danilo Krummrich (6): > rust: drm: Add Driver::ParentDevice associated type > rust: drm: Add UnbindGuard for drm_dev_enter/exit critical sections > rust: drm: Add RegistrationData to drm::Driver > rust: drm: Wrap ioctl dispatch in UnbindGuard > rust: drm: Pass registration data to ioctl handlers > rust: drm: Pass bound parent device to ioctl handlers Deborah, following up on your question in the other thread, this is roughly= how you'd use this in Tyr. diff --git a/drivers/gpu/drm/tyr/driver.rs b/drivers/gpu/drm/tyr/driver.rs index 7ac3707823b6..447e53c0eecf 100644 --- a/drivers/gpu/drm/tyr/driver.rs +++ b/drivers/gpu/drm/tyr/driver.rs @@ -37,13 +37,17 @@ regs, // }; -pub(crate) type IoMem =3D kernel::io::Mmio; +pub(crate) type IoMem<'bound> =3D kernel::io::mem::IoMem<'bound, SZ_2M>; pub(crate) struct TyrDrmDriver; /// Convenience type alias for the DRM device type for this driver. pub(crate) type TyrDrmDevice =3D drm::Device; +pub(crate) struct RegData<'bound> { + pub(crate) iomem: IoMem<'bound>, +} + #[pin_data(PinnedDrop)] pub(crate) struct TyrPlatformDriverData { _device: ARef, @@ -65,7 +69,7 @@ pub(crate) struct TyrDrmDeviceData { pub(crate) gpu_info: GpuInfo, } -fn issue_soft_reset(dev: &Device, iomem: &IoMem) -> Result { +fn issue_soft_reset(dev: &Device, iomem: &IoMem<'_>) -> Result { regs::GPU_CMD.write(iomem, regs::GPU_CMD_SOFT_RESET); poll::read_poll_timeout( @@ -133,8 +137,10 @@ fn probe( gpu_info, }); + let reg_data =3D RegData { iomem }; + let tdev =3D drm::UnregisteredDevice::::new(pdev, da= ta)?; - let tdev =3D drm::driver::Registration::new_foreign_owned(tdev, pd= ev.as_ref(), (), 0)?; + let tdev =3D drm::driver::Registration::new_foreign_owned(tdev, pd= ev.as_ref(), reg_data, 0)?; let driver =3D TyrPlatformDriverData { _device: tdev.into(), @@ -176,7 +182,7 @@ fn drop(self: Pin<&mut Self>) { #[vtable] impl drm::Driver for TyrDrmDriver { type Data =3D TyrDrmDeviceData; - type RegistrationData =3D ForLt!(()); + type RegistrationData =3D ForLt!(for<'a> RegData<'a>); type File =3D TyrDrmFileData; type Object =3D drm::gem::Object; type ParentDevice =3D platform::Device; diff --git a/drivers/gpu/drm/tyr/file.rs b/drivers/gpu/drm/tyr/file.rs index 9f53da7633ab..30efdf924cc2 100644 --- a/drivers/gpu/drm/tyr/file.rs +++ b/drivers/gpu/drm/tyr/file.rs @@ -10,6 +10,7 @@ }; use crate::driver::{ + RegData, TyrDrmDevice, TyrDrmDriver, // }; @@ -32,10 +33,12 @@ impl TyrDrmFileData { pub(crate) fn dev_query( ddev: &TyrDrmDevice, _pdev: &platform::Device, - _reg_data: &(), + reg_data: &RegData<'_>, devquery: &mut uapi::drm_panthor_dev_query, _file: &TyrDrmFile, ) -> Result { + let _iomem =3D reg_data.iomem; + if devquery.pointer =3D=3D 0 { match devquery.type_ { uapi::drm_panthor_dev_query_type_DRM_PANTHOR_DEV_QUERY_GPU= _INFO =3D> { diff --git a/drivers/gpu/drm/tyr/gpu.rs b/drivers/gpu/drm/tyr/gpu.rs index bb0473c85bf7..f169fb1ccc03 100644 --- a/drivers/gpu/drm/tyr/gpu.rs +++ b/drivers/gpu/drm/tyr/gpu.rs @@ -34,7 +34,7 @@ pub(crate) struct GpuInfo(pub(crate) uapi::drm_panthor_gpu_info); impl GpuInfo { - pub(crate) fn new(iomem: &IoMem) -> Self { + pub(crate) fn new(iomem: &IoMem<'_>) -> Self { let gpu_id =3D regs::GPU_ID.read(iomem); let csf_id =3D regs::GPU_CSF_ID.read(iomem); let gpu_rev =3D regs::GPU_REVID.read(iomem); @@ -206,7 +206,7 @@ fn from(value: u32) -> Self { } /// Powers on the l2 block. -pub(crate) fn l2_power_on(dev: &Device, iomem: &IoMem) -> Result { +pub(crate) fn l2_power_on(dev: &Device, iomem: &IoMem<'_>) -> Resul= t { regs::L2_PWRON_LO.write(iomem, 1); poll::read_poll_timeout( diff --git a/drivers/gpu/drm/tyr/regs.rs b/drivers/gpu/drm/tyr/regs.rs index 0881b3812afd..2b0da6019512 100644 --- a/drivers/gpu/drm/tyr/regs.rs +++ b/drivers/gpu/drm/tyr/regs.rs @@ -20,12 +20,12 @@ impl Register { #[inline] - pub(crate) fn read(&self, iomem: &IoMem) -> u32 { + pub(crate) fn read(&self, iomem: &IoMem<'_>) -> u32 { iomem.read32(OFFSET) } #[inline] - pub(crate) fn write(&self, iomem: &IoMem, value: u32) { + pub(crate) fn write(&self, iomem: &IoMem<'_>, value: u32) { iomem.write32(value, OFFSET); } }