Re: RFC: Data pattern buffer filling race condition fix

[Bart Van Assche <bvanassche@acm.org>]

On Saturday 06 November 2010 10:35:18 Bart Van Assche wrote:
> On multicore non-x86 CPUs fio has been observed to frequently reports false
> data verification failures with I/O engine libaio and I/O depths above one.
> This is because of a race condition in the function fill_pattern(). The code
> in that function only works correct if all CPUs of a multicore system
> observe store instructions in the order they were issued. That is the case for
> multicore x86 systems but not for all other CPU families, such as e.g. the
> POWER CPU family.

Note: more information about the x86 and PowerPC memory consistency models can be found here:
[1] Scott Owens, Susmit Sarkar, Peter Sewell, A Better x86 Memory Model: x86-TSO, Proceedings of the 22nd International Conference on Theorem Proving in Higher Order Logics, 2009, http://portal.acm.org/citation.cfm?id=1616107.
[2] Power Instruction Set  Architecture Version 2.06 Revision B, July 23, 2010, http://www.power.org.

A quote from [2]:
<quote>
The order in which the processor performs storage accesses, the order in which
those accesses are performed with respect to another processor or mechanism,
and the order in which those accesses are performed in main storage may all be
different.
</quote>