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Wed, 21 May 2025 10:05:29 +0800 X-Barracuda-RBL-Trusted-Forwarder: 10.28.252.165 Received: from runaguo-ubuntu-18-04.Zhaoxin.com (10.29.8.38) by zxbjmbx1.zhaoxin.com (10.29.252.163) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2507.44; Wed, 21 May 2025 10:04:21 +0800 From: Runa Guo-oc To: , , CC: , , , , , Subject: [PATCH] Add Zhaoxin support to enable tsc_reliable and arch_random features Date: Wed, 21 May 2025 10:04:21 +0800 X-ASG-Orig-Subj: [PATCH] Add Zhaoxin support to enable tsc_reliable and arch_random features Message-ID: <20250521020421.6862-1-RunaGuo-oc@zhaoxin.com> X-Mailer: git-send-email 2.17.1 Precedence: bulk X-Mailing-List: fio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain X-ClientProxiedBy: zxbjmbx1.zhaoxin.com (10.29.252.163) To zxbjmbx1.zhaoxin.com (10.29.252.163) X-Moderation-Data: 5/21/2025 10:05:28 AM X-Barracuda-Connect: ZXSHMBX3.zhaoxin.com[10.28.252.165] X-Barracuda-Start-Time: 1747793129 X-Barracuda-Encrypted: ECDHE-RSA-AES128-GCM-SHA256 X-Barracuda-URL: https://10.28.252.35:4443/cgi-mod/mark.cgi X-Virus-Scanned: by bsmtpd at zhaoxin.com X-Barracuda-Scan-Msg-Size: 1328 X-Barracuda-BRTS-Status: 1 X-Barracuda-Bayes: INNOCENT GLOBAL 0.0000 1.0000 -2.0210 X-Barracuda-Spam-Score: -2.02 X-Barracuda-Spam-Status: No, SCORE=-2.02 using global scores of TAG_LEVEL=1000.0 QUARANTINE_LEVEL=1000.0 KILL_LEVEL=9.0 tests= X-Barracuda-Spam-Report: Code version 3.2, rules version 3.2.3.141690 Rule breakdown below pts rule name description ---- ---------------------- -------------------------------------------------- Signed-off-by: Runa Guo-oc --- arch/arch-x86-common.h | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/arch/arch-x86-common.h b/arch/arch-x86-common.h index f32835cc..fbbbd62e 100644 --- a/arch/arch-x86-common.h +++ b/arch/arch-x86-common.h @@ -56,6 +56,33 @@ static inline void arch_init_amd(void) tsc_reliable = (edx & (1U << 8)) != 0; } +static inline void arch_init_zhaoxin(void) +{ + unsigned int eax, ebx, ecx = 0, edx; + + /* + * Check for TSC + */ + eax = 1; + do_cpuid(&eax, &ebx, &ecx, &edx); + if (!(edx & (1U << 4))) + return; + + /* + * Check for constant rate and synced (across cores) TSC + */ + eax = 0x80000007; + do_cpuid(&eax, &ebx, &ecx, &edx); + tsc_reliable = (edx & (1U << 8)) != 0; + + /* + * Check for FDRAND + */ + eax = 0x1; + do_cpuid(&eax, &ebx, &ecx, &edx); + arch_random = (ecx & (1U << 30)) != 0; +} + static inline void arch_init(char *envp[]) { unsigned int level; @@ -72,6 +99,8 @@ static inline void arch_init(char *envp[]) arch_init_intel(); else if (!strcmp(str, "AuthenticAMD") || !strcmp(str, "HygonGenuine")) arch_init_amd(); + else if (!strcmp(str, " Shanghai ") || !strcmp(str, "CentaurHauls")) + arch_init_zhaoxin(); } #endif -- 2.17.1