From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from list by lists.gnu.org with archive (Exim 4.71) id 1csZQh-0005Ei-CU for mharc-grub-devel@gnu.org; Mon, 27 Mar 2017 14:31:47 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41473) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1csZQe-0005DE-Kw for grub-devel@gnu.org; Mon, 27 Mar 2017 14:31:45 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1csZQd-0008A1-Nx for grub-devel@gnu.org; Mon, 27 Mar 2017 14:31:44 -0400 Received: from caffeine.csclub.uwaterloo.ca ([2620:101:f000:4901:c5c:0:caff:e12e]:50839) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1csZQd-00089M-Kk for grub-devel@gnu.org; Mon, 27 Mar 2017 14:31:43 -0400 Received: by caffeine.csclub.uwaterloo.ca (Postfix, from userid 20367) id 4430CC0086; Mon, 27 Mar 2017 14:31:42 -0400 (EDT) Date: Mon, 27 Mar 2017 14:31:42 -0400 To: The development of GNU GRUB Cc: Matthias Lange Subject: Re: 8250 memory mapped UART Message-ID: <20170327183141.GA11218@csclub.uwaterloo.ca> References: <947f7550-489b-0d54-dd43-422f01fdc7c6@kernkonzept.com> <666bf4a9-4f91-985e-d526-3df19cba3697@kernkonzept.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.23 (2014-03-12) From: lsorense@csclub.uwaterloo.ca (Lennart Sorensen) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2620:101:f000:4901:c5c:0:caff:e12e X-BeenThere: grub-devel@gnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: The development of GNU GRUB List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 27 Mar 2017 18:31:45 -0000 On Mon, Mar 27, 2017 at 11:29:48PM +0530, Gailu Singh wrote: > Can you please let me know how following three values are calculated in > your patch. I am trying to understand how do I change it for my board. > > port->board.base_baud = 4000000; > port->board.port_offset = 0x200; > port->board.base_offset = 0x1000; I would think this means: The configuration registers for the ports starts at the PCI base address of the device + 0x1000, and then each additional port is 0x200 above that (so port 2 would be at 0x1200 above the base address). A base_baud of 4000000 would normally mean the UART is fed from a 64MHz clock source. Pretty sure every uart I have used, the base_baud was 1/16th of the clock input (except some cases on the AM57xx where it uses 1/13th as far as I recall. It's a bit odd sometimes). Many PC boards in the past have used either 1.8432MHz or sometimes 14.7456 MHz, since that gives you perfect 115200 for the first one, and 921600 for the second one, as well as all integer divisions of those. After all with a base_baud of 4000000, a UART that only does integer divisions would give you 117647 when you ask for 115200, which is generally close enough. Of course some newer designs allow fractional divisions and can hence generate rather good results even with a non ideal input clock. -- Len Sorensen