From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.linutronix.de (146.0.238.70:993) by crypto-ml.lab.linutronix.de with IMAP4-SSL for ; 27 Jun 2018 14:33:02 -0000 Received: from aserp2130.oracle.com ([141.146.126.79]) by Galois.linutronix.de with esmtps (TLS1.2:RSA_AES_256_CBC_SHA256:256) (Exim 4.80) (envelope-from ) id 1fYBVE-0006fv-Ih for speck@linutronix.de; Wed, 27 Jun 2018 16:33:01 +0200 Received: from pps.filterd (aserp2130.oracle.com [127.0.0.1]) by aserp2130.oracle.com (8.16.0.22/8.16.0.22) with SMTP id w5RETlrP149091 for ; Wed, 27 Jun 2018 14:32:53 GMT Received: from aserv0022.oracle.com (aserv0022.oracle.com [141.146.126.234]) by aserp2130.oracle.com with ESMTP id 2jukmtw6rk-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK) for ; Wed, 27 Jun 2018 14:32:53 +0000 Received: from aserv0122.oracle.com (aserv0122.oracle.com [141.146.126.236]) by aserv0022.oracle.com (8.14.4/8.14.4) with ESMTP id w5REWrKc007627 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK) for ; Wed, 27 Jun 2018 14:32:53 GMT Received: from abhmp0016.oracle.com (abhmp0016.oracle.com [141.146.116.22]) by aserv0122.oracle.com (8.14.4/8.14.4) with ESMTP id w5REWrRg026551 for ; Wed, 27 Jun 2018 14:32:53 GMT Date: Wed, 27 Jun 2018 10:32:52 -0400 From: Konrad Rzeszutek Wilk Subject: [MODERATED] Re: [PATCH v4 7/8] [PATCH v4 7/8] Linux Patch #7 Message-ID: <20180627143251.GC21873@char.US.ORACLE.com> References: <20180623135445.930989669@localhost.localdomain> MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit To: speck@linutronix.de List-ID: On Wed, Jun 27, 2018 at 12:52:57PM +0200, speck for Thomas Gleixner wrote: > On Sat, 23 Jun 2018, speck for konrad.wilk_at_oracle.com wrote: > > > x86/KVM/VMX: Add framework for having disjoint amount of MSRs to save/restore > > I have a hard time to find the framework ... I am being optimistic :-) > > Changed that to: > > x86/KVM/VMX: Extend add_atomic_switch_msr() to allow VMENTER only MSRs > > The IA32_FLUSH_CMD MSR needs only to be written on VMENTER. Extend > add_atomic_switch_msr() with an entry_only parameter to allow storing the > MSR only in the guest (ENTRY) MST array. > > Hmm? Albeit do you want to wait a bit until I have the performance numbers at hand on how much this helps vs doing it the old-fashioned way (WRMSRL right before VMENTER)? > > Thanks, > > tglx