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Tue, 8 Sep 2026 17:34:46 +0000 Content-Type: multipart/alternative; boundary="------------O6iATs9D4EJySbI9kX0apPhL" Message-ID: <12110712-7775-44ad-90d1-e01b9288ab3c@amd.com> Date: Tue, 8 Sep 2026 13:34:42 -0400 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 0/2] Add GEM_CHANGE_HANDLE test To: vitaly.prosyak@amd.com, igt-dev@lists.freedesktop.org Cc: simona@ffwll.ch, kamil.konieczny@linux.intel.com, christian.koenig@amd.com, alexander.deucher@amd.com, sebastian.brzezinka@intel.com, "Francis, David" References: Content-Language: en-US From: vitaly prosyak In-Reply-To: X-ClientProxiedBy: YT4PR01CA0013.CANPRD01.PROD.OUTLOOK.COM (2603:10b6:b01:d1::12) To IA1PR12MB8190.namprd12.prod.outlook.com (2603:10b6:208:3f2::7) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: IA1PR12MB8190:EE_|CY8PR12MB7289:EE_ X-MS-Office365-Filtering-Correlation-Id: 8ad2652d-f8dc-4dfd-7563-08df0dcf7990 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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charset=UTF-8 Content-Transfer-Encoding: 8bit Hi Kamil and Sebastian, Just a gentle reminder to review the latest updates, as all feedback from v6 has now been addressed.  Thanks, Vitaly On 2026-09-01 21:03, vitaly.prosyak@amd.com wrote: > From: Vitaly Prosyak > > This series adds concurrency, edge-case, and functional coverage so > GEM_CHANGE_HANDLE behavior can be validated across lifetime races, > address-space diversity, and boundary inputs before kernel-side enablement. > > The ioctl is disabled for security reasons, but it also lacked a systematic > IGT testing process for corner cases and races. > > To re-enable it: > > 1. Land working IGT tests for the corner cases and races; this series > addresses that request. > 2. Handle `idr_preload` in the kernel and kernel-internal tests; this does > not belong in IGT. > 3. Define and validate `handle == 0` semantics; this series adds the > corresponding IGT coverage. > 4. Define and validate `handle == new_handle` semantics; this series adds > the corresponding IGT coverage. > > Requirement-to-subtest mapping: > > * Requirement 1 (corner cases and races): race-change-vs-close, > race-change-vs-change, race-change-vs-prime, > race-aggressive-change-vs-close, race-exploit-single-thread, > race-exploit-random-handles, race-close-before-lock, object invalid race > to random offsets, set/get race for random handles, all vmas race to > random offsets, all ppgtt race to random offsets, and all objects race to > random offsets. > * Requirement 2 (`idr_preload`): this is kernel/internal work and has no IGT > subtest in this series. > * Requirement 3 (`handle == 0` semantics): invalid-object/invalid-input > coverage in this series, including object invalid race to random offsets. > * Requirement 4 (`handle == new_handle` semantics): same-handle/no-op and > functional rename coverage in this series, including set/get race for > random handles. > > Review feedback addressed: > > * Kamil feedback: patch-by-patch buildability is maintained. > * Sebastian feedback: GEM_CHANGE_HANDLE is currently wired to > drm_invalid_op; prerequisite IGT coverage is provided before kernel-side > enablement. > * dmesg precondition: require_dmesg_access() prevents dmesg-based validation > without access. > * arm64 portability: the sched_yield path avoids the x86-only pause mnemonic > issue. > * checkpatch cleanup status: style cleanups were applied; known > volatile-related warnings remain. > --------------O6iATs9D4EJySbI9kX0apPhL Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: 8bit
Hi Kamil and Sebastian,
Just a gentle reminder to review the latest updates, as all feedback from v6 has now been addressed. 
Thanks, Vitaly


On 2026-09-01 21:03, vitaly.prosyak@amd.com wrote:
From: Vitaly Prosyak <vitaly.prosyak@amd.com>

This series adds concurrency, edge-case, and functional coverage so
GEM_CHANGE_HANDLE behavior can be validated across lifetime races,
address-space diversity, and boundary inputs before kernel-side enablement.

The ioctl is disabled for security reasons, but it also lacked a systematic
IGT testing process for corner cases and races.

To re-enable it:

1. Land working IGT tests for the corner cases and races; this series
   addresses that request.
2. Handle `idr_preload` in the kernel and kernel-internal tests; this does
   not belong in IGT.
3. Define and validate `handle == 0` semantics; this series adds the
   corresponding IGT coverage.
4. Define and validate `handle == new_handle` semantics; this series adds
   the corresponding IGT coverage.

Requirement-to-subtest mapping:

* Requirement 1 (corner cases and races): race-change-vs-close,
  race-change-vs-change, race-change-vs-prime,
  race-aggressive-change-vs-close, race-exploit-single-thread,
  race-exploit-random-handles, race-close-before-lock, object invalid race
  to random offsets, set/get race for random handles, all vmas race to
  random offsets, all ppgtt race to random offsets, and all objects race to
  random offsets.
* Requirement 2 (`idr_preload`): this is kernel/internal work and has no IGT
  subtest in this series.
* Requirement 3 (`handle == 0` semantics): invalid-object/invalid-input
  coverage in this series, including object invalid race to random offsets.
* Requirement 4 (`handle == new_handle` semantics): same-handle/no-op and
  functional rename coverage in this series, including set/get race for
  random handles.

Review feedback addressed:

* Kamil feedback: patch-by-patch buildability is maintained.
* Sebastian feedback: GEM_CHANGE_HANDLE is currently wired to
  drm_invalid_op; prerequisite IGT coverage is provided before kernel-side
  enablement.
* dmesg precondition: require_dmesg_access() prevents dmesg-based validation
  without access.
* arm64 portability: the sched_yield path avoids the x86-only pause mnemonic
  issue.
* checkpatch cleanup status: style cleanups were applied; known
  volatile-related warnings remain.
--------------O6iATs9D4EJySbI9kX0apPhL--