From: Riana Tauro <riana.tauro@intel.com>
To: Karthik Poosa <karthik.poosa@intel.com>, <igt-dev@lists.freedesktop.org>
Cc: <anshuman.gupta@intel.com>, <badal.nilawar@intel.com>,
<vinay.belgaumkar@intel.com>
Subject: Re: [PATCH i-g-t v2] tests/intel/xe_gt_freq: Add a wait after gt reset
Date: Fri, 9 Aug 2024 21:54:53 +0530 [thread overview]
Message-ID: <12e968d1-1065-4f25-bde1-87e78309dffe@intel.com> (raw)
In-Reply-To: <20240809154008.2438925-1-karthik.poosa@intel.com>
Hi Karthik
It's better to split patches. One for rename and another for wait after
gt reset.
Thanks,
Riana
On 8/9/2024 9:10 PM, Karthik Poosa wrote:
> After reset min and max takes sometime to get set.
> So add a wait of 100ms after gt reset before reading
> min and max frequencies.
>
> v2:
> - Rename ACT_FREQ_LATENCY_US to SLPC_FREQ_LATENCY_US and use it
> instead of new macro. (Riana)
>
> Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
> ---
> tests/intel/xe_gt_freq.c | 17 +++++++++--------
> 1 file changed, 9 insertions(+), 8 deletions(-)
>
> diff --git a/tests/intel/xe_gt_freq.c b/tests/intel/xe_gt_freq.c
> index 171f9cb44..427e12c55 100644
> --- a/tests/intel/xe_gt_freq.c
> +++ b/tests/intel/xe_gt_freq.c
> @@ -34,7 +34,7 @@
> * Too many intermediate components and steps before freq is adjusted
> * Specially if workload is under execution, so let's wait 100 ms.
> */
> -#define ACT_FREQ_LATENCY_US 100000
> +#define SLPC_FREQ_LATENCY_US 100000
>
> static int set_freq(int fd, int gt_id, const char *freq_name, uint32_t freq)
> {
> @@ -194,7 +194,7 @@ static void test_freq_fixed(int fd, int gt_id, bool gt_idle)
> */
> igt_assert_lt(0, set_freq(fd, gt_id, "min", rpn));
> igt_assert_lt(0, set_freq(fd, gt_id, "max", rpn));
> - usleep(ACT_FREQ_LATENCY_US);
> + usleep(SLPC_FREQ_LATENCY_US);
> igt_assert_eq_u32(get_freq(fd, gt_id, "cur"), rpn);
>
> if (gt_idle) {
> @@ -208,7 +208,7 @@ static void test_freq_fixed(int fd, int gt_id, bool gt_idle)
>
> igt_assert_lt(0, set_freq(fd, gt_id, "min", rpmid));
> igt_assert_lt(0, set_freq(fd, gt_id, "max", rpmid));
> - usleep(ACT_FREQ_LATENCY_US);
> + usleep(SLPC_FREQ_LATENCY_US);
> cur_freq = get_freq(fd, gt_id, "cur");
> /* If rpmid is around RPe, we could see SLPC follow it */
> igt_assert_lte_u32((rpmid - FREQ_UNIT_MHZ), cur_freq);
> @@ -224,7 +224,7 @@ static void test_freq_fixed(int fd, int gt_id, bool gt_idle)
>
> igt_assert_lt(0, set_freq(fd, gt_id, "min", rp0));
> igt_assert_lt(0, set_freq(fd, gt_id, "max", rp0));
> - usleep(ACT_FREQ_LATENCY_US);
> + usleep(SLPC_FREQ_LATENCY_US);
> /*
> * It is unlikely that PCODE will *always* respect any request above RPe
> * So for this level let's only check if GuC PC is doing its job
> @@ -259,7 +259,7 @@ static void test_freq_range(int fd, int gt_id, bool gt_idle)
>
> igt_assert_lt(0, set_freq(fd, gt_id, "min", rpn));
> igt_assert_lt(0, set_freq(fd, gt_id, "max", rpmid));
> - usleep(ACT_FREQ_LATENCY_US);
> + usleep(SLPC_FREQ_LATENCY_US);
> cur = get_freq(fd, gt_id, "cur");
> igt_assert(rpn <= cur && cur <= rpmid + FREQ_UNIT_MHZ);
>
> @@ -292,7 +292,7 @@ static void test_freq_low_max(int fd, int gt_id)
> */
> igt_assert_lt(0, set_freq(fd, gt_id, "min", rpmid));
> igt_assert_lt(0, set_freq(fd, gt_id, "max", rpn));
> - usleep(ACT_FREQ_LATENCY_US);
> + usleep(SLPC_FREQ_LATENCY_US);
>
> /* Cur freq will follow RPe, which could be higher than min freq */
> igt_assert_lte_u32((rpmid - FREQ_UNIT_MHZ),
> @@ -310,7 +310,7 @@ static void test_suspend(int fd, int gt_id)
>
> igt_assert_lt(0, set_freq(fd, gt_id, "min", rpn));
> igt_assert_lt(0, set_freq(fd, gt_id, "max", rpn));
> - usleep(ACT_FREQ_LATENCY_US);
> + usleep(SLPC_FREQ_LATENCY_US);
> igt_assert_eq_u32(get_freq(fd, gt_id, "cur"), rpn);
>
> igt_system_suspend_autoresume(SUSPEND_STATE_S3,
> @@ -337,11 +337,12 @@ static void test_reset(int fd, int gt_id, int cycles)
> "Failed after %d good cycles\n", i);
> igt_assert_f(set_freq(fd, gt_id, "max", rpn) > 0,
> "Failed after %d good cycles\n", i);
> - usleep(ACT_FREQ_LATENCY_US);
> + usleep(SLPC_FREQ_LATENCY_US);
> igt_assert_f(get_freq(fd, gt_id, "cur") == rpn,
> "Failed after %d good cycles\n", i);
>
> xe_force_gt_reset_async(fd, gt_id);
> + usleep(SLPC_FREQ_LATENCY_US);
>
> igt_assert_f(get_freq(fd, gt_id, "min") == rpn,
> "Failed after %d good cycles\n", i);
next prev parent reply other threads:[~2024-08-09 16:25 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-09 15:40 [PATCH i-g-t v2] tests/intel/xe_gt_freq: Add a wait after gt reset Karthik Poosa
2024-08-09 16:05 ` ✓ CI.xeBAT: success for tests/intel/xe_gt_freq: Add a wait after gt reset (rev2) Patchwork
2024-08-09 16:17 ` ✗ Fi.CI.BAT: failure " Patchwork
2024-08-09 16:24 ` Riana Tauro [this message]
2024-08-09 17:13 ` ✗ CI.xeFULL: " Patchwork
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