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From: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
To: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: igt-dev@lists.freedesktop.org
Subject: Re: [igt-dev] [PATCH i-g-t 2/2] tests/kms_psr_sink_crc: Test PSR source HW status.
Date: Mon, 02 Jul 2018 18:00:52 -0700	[thread overview]
Message-ID: <1530579652.24101.4.camel@intel.com> (raw)
In-Reply-To: <20180703001744.GL31287@intel.com>

On Mon, 2018-07-02 at 17:17 -0700, Rodrigo Vivi wrote:
> On Mon, Jul 02, 2018 at 04:35:59PM -0700, Dhinakaran Pandiyan wrote:
> > 
> > We make use of the status MMIO to tell whether the HW entered and
> > exited.
> > 
> > Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> > ---
> >  tests/kms_psr_sink_crc.c | 25 +++++++++++++++++--------
> >  1 file changed, 17 insertions(+), 8 deletions(-)
> > 
> > diff --git a/tests/kms_psr_sink_crc.c b/tests/kms_psr_sink_crc.c
> > index d36be7dd..08d0ce9a 100644
> > --- a/tests/kms_psr_sink_crc.c
> > +++ b/tests/kms_psr_sink_crc.c
> > @@ -195,7 +195,7 @@ static bool sink_support(data_t *data)
> >  		strstr(buf, "Sink_Support: yes\n");
> >  }
> > 
> > -static bool psr_enabled(data_t *data)
> > +static bool psr_hw_enabled(data_t *data)
> >  {
> >  	char buf[512];
> > 
> > @@ -205,15 +205,23 @@ static bool psr_enabled(data_t *data)
> >  		strstr(buf, "HW Enabled & Active bit: yes\n");
> >  }
> > 
> > +static bool psr_hw_status(data_t *data, bool active)
> > +{
> > +	char buf[512];
> > +
> > +	igt_debugfs_read(data->drm_fd, "i915_edp_psr_status",
> > buf);
> this read will trigger aux read and consequently psr exit right?
> 
> drm_dp_dpcd_readb(aux, DP_PSR_STATUS, &val) == 1)
>                         seq_printf(m, "Sink PSR status: 0x%x [%s]\n",
> val,
> 
> I believe we need to split the debugfs interfaces to handle the mmio
> bits
> without touching the aux ones what by itself triggers the psr exit
> 
Yeah, I was going to make that change later but this patch exposes the
problem.

> 
> > 
> > +
> > +	/* TODO: Update the checks for PSR2 */
> hm... probably better to find a psr2 bit already here....
> 
Couldn't definitively gather the corresponding PSR2 state from the
spec. I'll have to test with PSR2 hardware and find out.

> > 
> > +	return strstr(buf, "Source PSR status:") &&
> > +	       (active ? !!strstr(buf, "SRDENT") : !strstr(buf,
> > "SRDENT"));
> > +}
> > +
> >  static bool wait_psr_entry(data_t *data)
> >  {
> > -	int timeout = 5;
> > -	while (timeout--) {
> > -		if (psr_enabled(data))
> > -			return true;
> > -		sleep(1);
> > -	}
> > -	return false;
> > +	if (!psr_hw_enabled(data))
> > +		return false;
> > +
> > +	return igt_wait(psr_hw_status(data, true), 500, 1);
> >  }
> > 
> >  static inline void manual(const char *expected)
> > @@ -303,6 +311,7 @@ static void run_test(data_t *data)
> >  		expected = "screen GREEN";
> >  		break;
> >  	}
> > +	igt_assert(psr_hw_status(data, false));
> >  	manual(expected);
> >  }
> > 
> > --
> > 2.14.1
> > 
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  reply	other threads:[~2018-07-03  0:34 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-07-02 23:35 [igt-dev] [PATCH i-g-t 1/2] tests/kms_psr_sink_crc: Do not test sink crc Dhinakaran Pandiyan
2018-07-02 23:35 ` [igt-dev] [PATCH i-g-t 2/2] tests/kms_psr_sink_crc: Test PSR source HW status Dhinakaran Pandiyan
2018-07-03  0:17   ` Rodrigo Vivi
2018-07-03  1:00     ` Dhinakaran Pandiyan [this message]
2018-07-03  8:43   ` Daniel Vetter
2018-07-03  8:44     ` Daniel Vetter
2018-07-03 16:32       ` Rodrigo Vivi
2018-07-03 18:43         ` Dhinakaran Pandiyan
2018-07-03 21:35           ` Daniel Vetter
2018-07-04 14:19             ` Daniel Vetter
2018-07-05  8:31               ` Pandiyan, Dhinakaran
2018-07-05  9:39                 ` Daniel Vetter
2018-07-03  0:06 ` [igt-dev] ✗ Fi.CI.BAT: failure for series starting with [i-g-t,1/2] tests/kms_psr_sink_crc: Do not test sink crc Patchwork
2018-07-03  0:13 ` [igt-dev] [PATCH i-g-t 1/2] " Rodrigo Vivi
2018-07-03  1:01   ` Dhinakaran Pandiyan

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