[PATCH i-g-t 4/8] lib/intel_batchbuffer: add intel_bb_create_with_gt function

Juha-Pekka Heikkila
2026-03-20T13:46:53Z

add possibility to use gt id with batchbuffer when on xe

Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
---
lib/intel_batchbuffer.c | 26 ++++++++++++++++++++++++++
lib/intel_batchbuffer.h | 2 ++
2 files changed, 28 insertions(+)

diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
index 802e771a4..cfafaecd0 100644
--- a/lib/intel_batchbuffer.c
+++ b/lib/intel_batchbuffer.c
@@ -1162,6 +1162,32 @@ intel_bb_create_with_context(int fd, uint32_t ctx, uint32_t vm,
is_i915 ? REGION_SMEM : vram_if_possible(fd, 0), 0);
}

+/**
+ * intel_bb_create_with_gt:
+ * @fd: drm fd - i915 or xe
+ * @gt: gt id
+ * @vm: for xe vm_id, unused for i915
+ * @size: size of the batchbuffer
+ *
+ * Creates bb with gt id passed in @gt
+ *
+ * Returns:
+ *
+ * Pointer the intel_bb, asserts on failure.
+ */
+struct intel_bb *intel_bb_create_with_gt(int fd, uint32_t size, int vm, uint16_t gt)
+{
+ bool is_i915 = is_i915_device(fd);
+ bool relocs = is_i915 && gem_has_relocations(fd);
+
+ return __intel_bb_create(fd, gt, vm, NULL, size,
+ relocs && !aux_needs_softpin(fd), 0, 0, 0,
+ INTEL_ALLOCATOR_SIMPLE,
+ ALLOC_STRATEGY_HIGH_TO_LOW,
+ is_i915 ? REGION_SMEM : vram_if_possible(fd, 0),
+ gt);
+}
+
/**
* intel_bb_create_with_context_in_region:
* @fd: drm fd - i915 or xe
diff --git a/lib/intel_batchbuffer.h b/lib/intel_batchbuffer.h
index 7049dd2d0..8d54c6590 100644
--- a/lib/intel_batchbuffer.h
+++ b/lib/intel_batchbuffer.h
@@ -324,6 +324,8 @@ struct intel_bb *intel_bb_create(int fd, uint32_t size);
struct intel_bb *
intel_bb_create_with_context(int fd, uint32_t ctx, uint32_t vm,
const intel_ctx_cfg_t *cfg, uint32_t size);
+struct intel_bb *intel_bb_create_with_gt(int fd, uint32_t size, int vm,
+ uint16_t gt);
struct intel_bb *
intel_bb_create_with_context_in_region(int fd, uint32_t ctx, uint32_t vm,
const intel_ctx_cfg_t *cfg, uint32_t size, uint64_t region);
--
2.43.0