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From: Tvrtko Ursulin <tursulin@ursulin.net>
To: igt-dev@lists.freedesktop.org
Cc: Intel-gfx@lists.freedesktop.org,
	Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Subject: [igt-dev] [PATCH i-g-t 1/5] include: i915 uAPI headers
Date: Thu,  5 Apr 2018 13:40:24 +0100	[thread overview]
Message-ID: <20180405124028.22766-2-tvrtko.ursulin@linux.intel.com> (raw)
In-Reply-To: <20180405124028.22766-1-tvrtko.ursulin@linux.intel.com>

From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Temporary up to date uAPI headers.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 include/drm-uapi/i915_drm.h | 19 ++++++++++++++++++-
 1 file changed, 18 insertions(+), 1 deletion(-)

diff --git a/include/drm-uapi/i915_drm.h b/include/drm-uapi/i915_drm.h
index 16e452aa12d4..14c7e790f6ed 100644
--- a/include/drm-uapi/i915_drm.h
+++ b/include/drm-uapi/i915_drm.h
@@ -110,9 +110,17 @@ enum drm_i915_gem_engine_class {
 enum drm_i915_pmu_engine_sample {
 	I915_SAMPLE_BUSY = 0,
 	I915_SAMPLE_WAIT = 1,
-	I915_SAMPLE_SEMA = 2
+	I915_SAMPLE_SEMA = 2,
+	I915_SAMPLE_QUEUED = 3,
+	I915_SAMPLE_RUNNABLE = 4,
+	I915_SAMPLE_RUNNING = 5,
 };
 
+ /* Divide counter value by divisor to get the real value. */
+#define I915_SAMPLE_QUEUED_DIVISOR (1024)
+#define I915_SAMPLE_RUNNABLE_DIVISOR (1024)
+#define I915_SAMPLE_RUNNING_DIVISOR (1024)
+
 #define I915_PMU_SAMPLE_BITS (4)
 #define I915_PMU_SAMPLE_MASK (0xf)
 #define I915_PMU_SAMPLE_INSTANCE_BITS (8)
@@ -133,6 +141,15 @@ enum drm_i915_pmu_engine_sample {
 #define I915_PMU_ENGINE_SEMA(class, instance) \
 	__I915_PMU_ENGINE(class, instance, I915_SAMPLE_SEMA)
 
+#define I915_PMU_ENGINE_QUEUED(class, instance) \
+	__I915_PMU_ENGINE(class, instance, I915_SAMPLE_QUEUED)
+
+#define I915_PMU_ENGINE_RUNNABLE(class, instance) \
+	__I915_PMU_ENGINE(class, instance, I915_SAMPLE_RUNNABLE)
+
+#define I915_PMU_ENGINE_RUNNING(class, instance) \
+	__I915_PMU_ENGINE(class, instance, I915_SAMPLE_RUNNING)
+
 #define __I915_PMU_OTHER(x) (__I915_PMU_ENGINE(0xff, 0xff, 0xf) + 1 + (x))
 
 #define I915_PMU_ACTUAL_FREQUENCY	__I915_PMU_OTHER(0)
-- 
2.14.1

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  reply	other threads:[~2018-04-05 12:40 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-04-05 12:40 [Intel-gfx] [PATCH i-g-t v2 0/5] Queued/runnable/running engine stats Tvrtko Ursulin
2018-04-05 12:40 ` Tvrtko Ursulin [this message]
2018-04-05 12:40 ` [igt-dev] [PATCH i-g-t 2/5] intel-gpu-overlay: Add engine queue stats Tvrtko Ursulin
2018-04-05 12:40 ` [igt-dev] [PATCH i-g-t 3/5] intel-gpu-overlay: Show 1s, 30s and 15m GPU load Tvrtko Ursulin
2018-04-05 12:40 ` [igt-dev] [PATCH i-g-t 4/5] tests/perf_pmu: Add tests for engine queued/runnable/running stats Tvrtko Ursulin
2018-04-05 12:40 ` [Intel-gfx] [PATCH i-g-t 5/5] tests/i915_query: Engine queues tests Tvrtko Ursulin
2018-04-05 14:05 ` [igt-dev] ✓ Fi.CI.BAT: success for Queued/runnable/running engine stats (rev2) Patchwork
2018-04-05 16:45 ` [igt-dev] ✗ Fi.CI.IGT: warning " Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2018-03-19 18:22 [Intel-gfx] [PATCH i-g-t 0/5] Queued/runnable/running engine stats Tvrtko Ursulin
2018-03-19 18:22 ` [igt-dev] [PATCH i-g-t 1/5] include: i915 uAPI headers Tvrtko Ursulin

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