[igt-dev] [PATCH i-g-t v3] tools/intel_dp_compliance: Use ARGB8888 format fbs for Gen 10

[igt-dev] [PATCH i-g-t v3] tools/intel_dp_compliance: Use ARGB8888 format fbs for Gen 10

[Radhakrishna Sripada]

According to Display WA #1172, to truly bypass the color data on Gen 10
use ARGB8888 instead of XRGB8888 to pass compliance.

v2: Use ARGB8888 format only for video pattern fb, set per pixel alpha
    value to 0xff in fill_framebuffer.(Imre)
v3: Set the aplha value for each pixel(Imre)

Cc: Imre Deak <imre.deak@intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
---
 tools/intel_dp_compliance.c | 20 ++++++++++++++------
 1 file changed, 14 insertions(+), 6 deletions(-)

diff --git a/tools/intel_dp_compliance.c b/tools/intel_dp_compliance.c
index c40548e79227..14631a46a9c1 100644
--- a/tools/intel_dp_compliance.c
+++ b/tools/intel_dp_compliance.c
@@ -175,7 +175,7 @@ static int tio_fd;
 struct termios saved_tio;
 
 drmModeRes *resources;
-int drm_fd, modes;
+int drm_fd, modes, gen;
 uint64_t tiling = LOCAL_DRM_FORMAT_MOD_NONE;
 uint32_t depth = 24, stride, bpp;
 int specified_mode_num = -1, specified_disp_id = -1;
@@ -506,9 +506,13 @@ static int setup_video_pattern_framebuffer(struct connector *dp_conn)
 
 	video_width = dp_conn->test_pattern.hdisplay;
 	video_height = dp_conn->test_pattern.vdisplay;
+	/*
+	 * Display WA1172: Gen10 To pass the color data unaffected set either
+	 * per-pixel alpha or Plane alpha to 0xff. Use ARGB8888 and set alpha to 0xff.
+	 */
 	dp_conn->test_pattern.fb = igt_create_fb(drm_fd,
 						 video_width, video_height,
-						 DRM_FORMAT_XRGB8888,
+						 gen == 10 ? DRM_FORMAT_ARGB8888 : DRM_FORMAT_XRGB8888,
 						 LOCAL_DRM_FORMAT_MOD_NONE,
 						 &dp_conn->test_pattern.fb_pattern);
 	igt_assert(dp_conn->test_pattern.fb);
@@ -537,6 +541,7 @@ static int fill_framebuffer(struct connector *dp_conn)
 	uint32_t *red_ptr, *green_ptr, *blue_ptr, *white_ptr, *src_ptr, *dst_ptr;
 	int x, y;
 	int32_t pixel_val;
+	uint8_t alpha;
 
 	video_width = dp_conn->test_pattern.hdisplay;
 	video_height = dp_conn->test_pattern.vdisplay;
@@ -554,10 +559,12 @@ static int fill_framebuffer(struct connector *dp_conn)
 	while (x < video_width) {
 		for (pixel_val = 0; pixel_val < 256;
 		     pixel_val = pixel_val + (256 / tile_width)) {
-			red_ptr[x] = pixel_val << 16;
-			green_ptr[x] = pixel_val << 8;
-			blue_ptr[x] = pixel_val << 0;
-			white_ptr[x] = red_ptr[x] | green_ptr[x] | blue_ptr[x];
+			alpha = gen == 10 ? 0xff : 0;
+			red_ptr[x] = alpha << 24 | pixel_val << 16;
+			green_ptr[x] = alpha << 24 | pixel_val << 8;
+			blue_ptr[x] = alpha << 24 | pixel_val << 0;
+			white_ptr[x] = alpha << 24 | red_ptr[x] | green_ptr[x] |
+				       blue_ptr[x];
 			if (++x >= video_width)
 				break;
 		}
@@ -1036,6 +1043,7 @@ int main(int argc, char **argv)
 	set_termio_mode();
 
 	drm_fd = drm_open_driver(DRIVER_ANY);
+	gen = intel_gen(intel_get_drm_devid(drm_fd));
 
 	kmstest_set_vt_graphics_mode();
 	setup_debugfs_files();
-- 
2.9.3

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Re: [igt-dev] [PATCH i-g-t v3] tools/intel_dp_compliance: Use ARGB8888 format fbs for Gen 10

[Manasi Navare]

On Fri, Jul 13, 2018 at 02:11:14PM -0700, Radhakrishna Sripada wrote:
> According to Display WA #1172, to truly bypass the color data on Gen 10
> use ARGB8888 instead of XRGB8888 to pass compliance.
> 
> v2: Use ARGB8888 format only for video pattern fb, set per pixel alpha
>     value to 0xff in fill_framebuffer.(Imre)
> v3: Set the aplha value for each pixel(Imre)
> 
> Cc: Imre Deak <imre.deak@intel.com>
> Cc: Manasi Navare <manasi.d.navare@intel.com>
> Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
> ---
>  tools/intel_dp_compliance.c | 20 ++++++++++++++------
>  1 file changed, 14 insertions(+), 6 deletions(-)
> 
> diff --git a/tools/intel_dp_compliance.c b/tools/intel_dp_compliance.c
> index c40548e79227..14631a46a9c1 100644
> --- a/tools/intel_dp_compliance.c
> +++ b/tools/intel_dp_compliance.c
> @@ -175,7 +175,7 @@ static int tio_fd;
>  struct termios saved_tio;
>  
>  drmModeRes *resources;
> -int drm_fd, modes;
> +int drm_fd, modes, gen;
>  uint64_t tiling = LOCAL_DRM_FORMAT_MOD_NONE;
>  uint32_t depth = 24, stride, bpp;
>  int specified_mode_num = -1, specified_disp_id = -1;
> @@ -506,9 +506,13 @@ static int setup_video_pattern_framebuffer(struct connector *dp_conn)
>  
>  	video_width = dp_conn->test_pattern.hdisplay;
>  	video_height = dp_conn->test_pattern.vdisplay;
> +	/*
> +	 * Display WA1172: Gen10 To pass the color data unaffected set either
> +	 * per-pixel alpha or Plane alpha to 0xff. Use ARGB8888 and set alpha to 0xff.
> +	 */
>  	dp_conn->test_pattern.fb = igt_create_fb(drm_fd,
>  						 video_width, video_height,
> -						 DRM_FORMAT_XRGB8888,
> +						 gen == 10 ? DRM_FORMAT_ARGB8888 : DRM_FORMAT_XRGB8888,
>  						 LOCAL_DRM_FORMAT_MOD_NONE,
>  						 &dp_conn->test_pattern.fb_pattern);
>  	igt_assert(dp_conn->test_pattern.fb);
> @@ -537,6 +541,7 @@ static int fill_framebuffer(struct connector *dp_conn)
>  	uint32_t *red_ptr, *green_ptr, *blue_ptr, *white_ptr, *src_ptr, *dst_ptr;
>  	int x, y;
>  	int32_t pixel_val;
> +	uint8_t alpha;
>  
>  	video_width = dp_conn->test_pattern.hdisplay;
>  	video_height = dp_conn->test_pattern.vdisplay;
> @@ -554,10 +559,12 @@ static int fill_framebuffer(struct connector *dp_conn)
>  	while (x < video_width) {
>  		for (pixel_val = 0; pixel_val < 256;
>  		     pixel_val = pixel_val + (256 / tile_width)) {
> -			red_ptr[x] = pixel_val << 16;
> -			green_ptr[x] = pixel_val << 8;
> -			blue_ptr[x] = pixel_val << 0;
> -			white_ptr[x] = red_ptr[x] | green_ptr[x] | blue_ptr[x];
> +			alpha = gen == 10 ? 0xff : 0;

Or you could just define alpha = 0xff << 24 here and or with alpha instead of shifting everytime.
But thats just an added optimization.

> +			red_ptr[x] = alpha << 24 | pixel_val << 16;
> +			green_ptr[x] = alpha << 24 | pixel_val << 8;
> +			blue_ptr[x] = alpha << 24 | pixel_val << 0;
> +			white_ptr[x] = alpha << 24 | red_ptr[x] | green_ptr[x] |

This looks good to me, it will keep the same color ramp as asked by the compliance test pattern
but with alpha value set to 0xff for all the pixels.

Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>

Manasi

> +				       blue_ptr[x];
>  			if (++x >= video_width)
>  				break;
>  		}
> @@ -1036,6 +1043,7 @@ int main(int argc, char **argv)
>  	set_termio_mode();
>  
>  	drm_fd = drm_open_driver(DRIVER_ANY);
> +	gen = intel_gen(intel_get_drm_devid(drm_fd));
>  
>  	kmstest_set_vt_graphics_mode();
>  	setup_debugfs_files();
> -- 
> 2.9.3
> 
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[igt-dev] ✓ Fi.CI.BAT: success for tools/intel_dp_compliance: Use ARGB8888 format fbs for Gen 10 (rev3)

[Patchwork]

== Series Details ==

Series: tools/intel_dp_compliance: Use ARGB8888 format fbs for Gen 10 (rev3)
URL   : https://patchwork.freedesktop.org/series/45684/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4487 -> IGTPW_1584 =

== Summary - SUCCESS ==

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/45684/revisions/3/mbox/


== Changes ==

  No changes found


== Participating hosts (46 -> 42) ==

  Missing    (4): fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-hsw-4200u 


== Build changes ==

    * IGT: IGT_4556 -> IGTPW_1584

  CI_DRM_4487: 627ed020cac6a73f0a014537dac7191efbb57084 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_1584: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1584/
  IGT_4556: caea9c5b3aa1191c0152d7c0f22a94efca4fd048 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1584/issues.html
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[igt-dev] ✓ Fi.CI.IGT: success for tools/intel_dp_compliance: Use ARGB8888 format fbs for Gen 10 (rev3)

[Patchwork]

== Series Details ==

Series: tools/intel_dp_compliance: Use ARGB8888 format fbs for Gen 10 (rev3)
URL   : https://patchwork.freedesktop.org/series/45684/
State : success

== Summary ==

= CI Bug Log - changes from IGT_4556_full -> IGTPW_1584_full =

== Summary - WARNING ==

  Minor unknown changes coming with IGTPW_1584_full need to be verified
  manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_1584_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/45684/revisions/3/mbox/

== Possible new issues ==

  Here are the unknown changes that may have been introduced in IGTPW_1584_full:

  === IGT changes ===

    ==== Warnings ====

    igt@gem_exec_schedule@deep-bsd1:
      shard-kbl:          PASS -> SKIP +2

    {igt@gem_userptr_blits@readonly-pwrite-unsync}:
      shard-kbl:          SKIP -> PASS +4
      shard-glk:          SKIP -> PASS +1

    {igt@gem_userptr_blits@readonly-unsync}:
      shard-apl:          SKIP -> PASS +2

    
== Known issues ==

  Here are the changes found in IGTPW_1584_full that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@kms_cursor_legacy@all-pipes-torture-bo:
      shard-apl:          PASS -> DMESG-WARN (fdo#107122)
      shard-glk:          PASS -> DMESG-WARN (fdo#107122)

    igt@kms_flip@2x-plain-flip-ts-check-interruptible:
      shard-hsw:          PASS -> FAIL (fdo#100368)

    igt@kms_flip@modeset-vs-vblank-race-interruptible:
      shard-hsw:          PASS -> FAIL (fdo#103060)

    
    ==== Possible fixes ====

    igt@drv_suspend@shrink:
      shard-snb:          INCOMPLETE (fdo#105411, fdo#106886) -> PASS
      shard-kbl:          INCOMPLETE (fdo#103665, fdo#106886) -> PASS

    igt@gem_exec_big:
      shard-hsw:          INCOMPLETE (fdo#103540) -> PASS

    igt@gem_exec_store@basic-bsd2:
      shard-snb:          INCOMPLETE (fdo#105411) -> SKIP

    igt@gem_ppgtt@blt-vs-render-ctx0:
      shard-kbl:          INCOMPLETE (fdo#103665, fdo#106023) -> PASS

    igt@kms_flip@2x-plain-flip-ts-check-interruptible:
      shard-glk:          FAIL (fdo#100368) -> PASS +1

    igt@kms_flip@flip-vs-expired-vblank:
      shard-glk:          FAIL (fdo#102887) -> PASS

    igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-plflip-blt:
      shard-glk:          DMESG-WARN (fdo#106247) -> PASS

    igt@kms_rotation_crc@primary-rotation-180:
      shard-snb:          FAIL (fdo#103925) -> PASS

    igt@kms_setmode@basic:
      shard-kbl:          FAIL (fdo#99912) -> PASS

    
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
  fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887
  fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060
  fdo#103540 https://bugs.freedesktop.org/show_bug.cgi?id=103540
  fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665
  fdo#103925 https://bugs.freedesktop.org/show_bug.cgi?id=103925
  fdo#105411 https://bugs.freedesktop.org/show_bug.cgi?id=105411
  fdo#106023 https://bugs.freedesktop.org/show_bug.cgi?id=106023
  fdo#106247 https://bugs.freedesktop.org/show_bug.cgi?id=106247
  fdo#106886 https://bugs.freedesktop.org/show_bug.cgi?id=106886
  fdo#107122 https://bugs.freedesktop.org/show_bug.cgi?id=107122
  fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912


== Participating hosts (5 -> 5) ==

  No changes in participating hosts


== Build changes ==

    * IGT: IGT_4556 -> IGTPW_1584
    * Linux: CI_DRM_4485 -> CI_DRM_4487

  CI_DRM_4485: d3d471400bf907f8a6e51c8a475202a61bcdf2de @ git://anongit.freedesktop.org/gfx-ci/linux
  CI_DRM_4487: 627ed020cac6a73f0a014537dac7191efbb57084 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_1584: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1584/
  IGT_4556: caea9c5b3aa1191c0152d7c0f22a94efca4fd048 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_1584/shards.html
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Re: [igt-dev] [PATCH i-g-t v3] tools/intel_dp_compliance: Use ARGB8888 format fbs for Gen 10

[Imre Deak]

On Fri, Jul 13, 2018 at 02:11:14PM -0700, Radhakrishna Sripada wrote:
> According to Display WA #1172, to truly bypass the color data on Gen 10
> use ARGB8888 instead of XRGB8888 to pass compliance.
> 
> v2: Use ARGB8888 format only for video pattern fb, set per pixel alpha
>     value to 0xff in fill_framebuffer.(Imre)
> v3: Set the aplha value for each pixel(Imre)
> 
> Cc: Imre Deak <imre.deak@intel.com>
> Cc: Manasi Navare <manasi.d.navare@intel.com>
> Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>

Pushed to igt, thanks for the patch and review.

> ---
>  tools/intel_dp_compliance.c | 20 ++++++++++++++------
>  1 file changed, 14 insertions(+), 6 deletions(-)
> 
> diff --git a/tools/intel_dp_compliance.c b/tools/intel_dp_compliance.c
> index c40548e79227..14631a46a9c1 100644
> --- a/tools/intel_dp_compliance.c
> +++ b/tools/intel_dp_compliance.c
> @@ -175,7 +175,7 @@ static int tio_fd;
>  struct termios saved_tio;
>  
>  drmModeRes *resources;
> -int drm_fd, modes;
> +int drm_fd, modes, gen;
>  uint64_t tiling = LOCAL_DRM_FORMAT_MOD_NONE;
>  uint32_t depth = 24, stride, bpp;
>  int specified_mode_num = -1, specified_disp_id = -1;
> @@ -506,9 +506,13 @@ static int setup_video_pattern_framebuffer(struct connector *dp_conn)
>  
>  	video_width = dp_conn->test_pattern.hdisplay;
>  	video_height = dp_conn->test_pattern.vdisplay;
> +	/*
> +	 * Display WA1172: Gen10 To pass the color data unaffected set either
> +	 * per-pixel alpha or Plane alpha to 0xff. Use ARGB8888 and set alpha to 0xff.
> +	 */
>  	dp_conn->test_pattern.fb = igt_create_fb(drm_fd,
>  						 video_width, video_height,
> -						 DRM_FORMAT_XRGB8888,
> +						 gen == 10 ? DRM_FORMAT_ARGB8888 : DRM_FORMAT_XRGB8888,
>  						 LOCAL_DRM_FORMAT_MOD_NONE,
>  						 &dp_conn->test_pattern.fb_pattern);
>  	igt_assert(dp_conn->test_pattern.fb);
> @@ -537,6 +541,7 @@ static int fill_framebuffer(struct connector *dp_conn)
>  	uint32_t *red_ptr, *green_ptr, *blue_ptr, *white_ptr, *src_ptr, *dst_ptr;
>  	int x, y;
>  	int32_t pixel_val;
> +	uint8_t alpha;
>  
>  	video_width = dp_conn->test_pattern.hdisplay;
>  	video_height = dp_conn->test_pattern.vdisplay;
> @@ -554,10 +559,12 @@ static int fill_framebuffer(struct connector *dp_conn)
>  	while (x < video_width) {
>  		for (pixel_val = 0; pixel_val < 256;
>  		     pixel_val = pixel_val + (256 / tile_width)) {
> -			red_ptr[x] = pixel_val << 16;
> -			green_ptr[x] = pixel_val << 8;
> -			blue_ptr[x] = pixel_val << 0;
> -			white_ptr[x] = red_ptr[x] | green_ptr[x] | blue_ptr[x];
> +			alpha = gen == 10 ? 0xff : 0;
> +			red_ptr[x] = alpha << 24 | pixel_val << 16;
> +			green_ptr[x] = alpha << 24 | pixel_val << 8;
> +			blue_ptr[x] = alpha << 24 | pixel_val << 0;
> +			white_ptr[x] = alpha << 24 | red_ptr[x] | green_ptr[x] |
> +				       blue_ptr[x];
>  			if (++x >= video_width)
>  				break;
>  		}
> @@ -1036,6 +1043,7 @@ int main(int argc, char **argv)
>  	set_termio_mode();
>  
>  	drm_fd = drm_open_driver(DRIVER_ANY);
> +	gen = intel_gen(intel_get_drm_devid(drm_fd));
>  
>  	kmstest_set_vt_graphics_mode();
>  	setup_debugfs_files();
> -- 
> 2.9.3
> 
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