[igt-dev] [PATCH i-g-t 3/3] tests/kms_pipe_crc_basic: Add flip tests to ensure basic CRC sanity checking.

Maarten Lankhorst
2019-02-25T11:12:58Z

Warn if a CRC for every unique color will end up being identical, it's
not counted as a test failure because intel might not handle it correctly.

After this, flip and dirtyfb a number of times to ensure that basic CRC
reading works as intended.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Suggested-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
---
tests/kms_pipe_crc_basic.c | 86 ++++++++++++++++++++++++++++++++++++--
1 file changed, 83 insertions(+), 3 deletions(-)

diff --git a/tests/kms_pipe_crc_basic.c b/tests/kms_pipe_crc_basic.c
index 36ce624e4e9e..1d6f318ee5e7 100644
--- a/tests/kms_pipe_crc_basic.c
+++ b/tests/kms_pipe_crc_basic.c
@@ -29,7 +29,7 @@
#include <stdio.h>
#include <string.h>
#include <fcntl.h>
-
+#include "igt_rand.h"

typedef struct {
int drm_fd;
@@ -41,9 +41,15 @@ typedef struct {
static struct {
double r, g, b;
igt_crc_t crc;
-} colors[2] = {
+} colors[] = {
+ { .r = 0.0, .g = 0.0, .b = 0.0 },
+ { .r = 0.0, .g = 0.0, .b = 1.0 },
{ .r = 0.0, .g = 1.0, .b = 0.0 },
{ .r = 0.0, .g = 1.0, .b = 1.0 },
+ { .r = 1.0, .g = 0.0, .b = 0.0 },
+ { .r = 1.0, .g = 0.0, .b = 1.0 },
+ { .r = 1.0, .g = 1.0, .b = 0.0 },
+ { .r = 1.0, .g = 1.0, .b = 1.0 },
};

static void test_bad_source(data_t *data)
@@ -153,10 +159,81 @@ static void test_read_crc(data_t *data, enum pipe pipe, unsigned flags)
}
}

-data_t data = {0, };
+static void test_flip_crc(data_t *data, enum pipe pipe)
+{
+ igt_display_t *display = &data->display;
+ igt_output_t *output = igt_get_single_output_for_pipe(display, pipe);
+ igt_plane_t *primary;
+ drmModeModeInfo *mode = igt_output_get_mode(output);
+ igt_crc_t ref_crcs[ARRAY_SIZE(colors)], crc;
+ int c, i, j;
+ struct igt_fb fbs[ARRAY_SIZE(colors)] = {};
+ igt_pipe_crc_t *pipe_crc;
+ unsigned seed = 0x1234567 * (pipe + 1);
+ int prev;
+
+ igt_skip_on(pipe >= display->n_pipes);
+ igt_require_f(output, "No connector found for pipe %s\n",
+ kmstest_pipe_name(pipe));
+
+ igt_display_reset(display);
+ igt_output_set_pipe(output, pipe);
+ primary = igt_output_get_plane(output, 0);
+
+ for (c = 0; c < ARRAY_SIZE(colors); c++) {
+ igt_create_color_fb(display->drm_fd,
+ mode->hdisplay, mode->vdisplay,
+ DRM_FORMAT_XRGB8888,
+ LOCAL_DRM_FORMAT_MOD_NONE,
+ colors[c].r,
+ colors[c].g,
+ colors[c].b,
+ &fbs[c]);
+
+ igt_plane_set_fb(primary, &fbs[c]);
+ igt_display_commit2(display, c ? COMMIT_UNIVERSAL : COMMIT_LEGACY);
+ if (!c)
+ pipe_crc = igt_pipe_crc_new(display->drm_fd, pipe,
+ INTEL_PIPE_CRC_SOURCE_AUTO);
+
+ igt_pipe_crc_collect_crc(pipe_crc, &ref_crcs[c]);
+
+ for (j = c - 1; j >= 0; j--)
+ igt_warn_on_f(igt_check_crc_equal(&ref_crcs[c], &ref_crcs[j]),
+ "Identical CRC for very different colors, %g %g %g vs %g %g %g\n",
+ colors[c].r, colors[c].g, colors[c].b,
+ colors[j].r, colors[j].g, colors[j].b);
+ }
+
+ igt_pipe_crc_start(pipe_crc);
+
+ prev = c;
+ for (i = 0; i < 10 * ARRAY_SIZE(colors); i++) {
+ c = hars_petruska_f54_1_random(&seed) % ARRAY_SIZE(colors);
+ igt_debug("Testing color %g %g %g with %s\n",
+ colors[c].r, colors[c].g, colors[c].b,
+ c == prev ? "dirtyfb" : "commit");
+
+ if (c != prev) {
+ igt_plane_set_fb(primary, &fbs[c]);
+ igt_display_commit2(display, COMMIT_UNIVERSAL);
+ } else {
+ igt_dirty_fb(display->drm_fd, &fbs[c]);
+ igt_wait_for_vblank(display->drm_fd, pipe);
+ }
+
+ igt_pipe_crc_get_current(display->drm_fd, pipe_crc, &crc);
+ igt_assert_crc_equal(&ref_crcs[c], &crc);
+ prev = c;
+ }
+
+ for (c = 0; c < ARRAY_SIZE(colors); c++)
+ igt_remove_fb(display->drm_fd, &fbs[c]);
+}

igt_main
{
+ data_t data = {};
enum pipe pipe;

igt_fixture {
@@ -210,6 +287,9 @@ igt_main

igt_disallow_hang(data.drm_fd, hang);
}
+
+ igt_subtest_f("flip-crc-pipe-%s", kmstest_pipe_name(pipe))
+ test_flip_crc(&data, pipe);
}

igt_fixture {