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From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: igt-dev@lists.freedesktop.org
Cc: Intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH i-g-t 09/21] gem_wsim: Submit fence support
Date: Wed,  8 May 2019 13:10:46 +0100	[thread overview]
Message-ID: <20190508121058.27038-10-tvrtko.ursulin@linux.intel.com> (raw)
In-Reply-To: <20190508121058.27038-1-tvrtko.ursulin@linux.intel.com>

From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Add support for submit fences in a way similar to how normal input fences
are handled. Eg:

  1.RCS.500-1000.0.0
  1.VCS1.3000.s-1.0
  1.VCS2.3000.s-2.0

Submit fences are signalled when the originating request enters the
submission backend.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 benchmarks/gem_wsim.c  | 20 ++++++++++++++++----
 benchmarks/wsim/README | 17 +++++++++++++++++
 2 files changed, 33 insertions(+), 4 deletions(-)

diff --git a/benchmarks/gem_wsim.c b/benchmarks/gem_wsim.c
index f1fcef5dcfba..5245692df6eb 100644
--- a/benchmarks/gem_wsim.c
+++ b/benchmarks/gem_wsim.c
@@ -87,6 +87,7 @@ enum w_type
 struct deps
 {
 	int nr;
+	bool submit_fence;
 	int *list;
 };
 
@@ -253,17 +254,23 @@ parse_dependencies(unsigned int nr_steps, struct w_step *w, char *_desc)
 		   w->data_deps.list == w->fence_deps.list);
 
 	while ((token = strtok_r(tstart, "/", &tctx)) != NULL) {
+		bool submit_fence = false;
 		char *str = token;
 		struct deps *deps;
 		int dep;
 
 		tstart = NULL;
 
-		if (strlen(token) > 1 && token[0] == 'f') {
+		if (str[0] == '-' || (str[0] >= '0' && str[0] <= '9')) {
+			deps = &w->data_deps;
+		} else {
+			if (str[0] == 's')
+				submit_fence = true;
+			else if (str[0] != 'f')
+				return -1;
+
 			deps = &w->fence_deps;
 			str++;
-		} else {
-			deps = &w->data_deps;
 		}
 
 		dep = atoi(str);
@@ -281,6 +288,7 @@ parse_dependencies(unsigned int nr_steps, struct w_step *w, char *_desc)
 					     sizeof(*deps->list) * deps->nr);
 			igt_assert(deps->list);
 			deps->list[deps->nr - 1] = dep;
+			deps->submit_fence = submit_fence;
 		}
 	}
 
@@ -1921,7 +1929,11 @@ do_eb(struct workload *wrk, struct w_step *w, enum intel_engine_id engine,
 		igt_assert(tgt >= 0 && tgt < w->idx);
 		igt_assert(wrk->steps[tgt].emit_fence > 0);
 
-		w->eb.flags |= I915_EXEC_FENCE_IN;
+		if (w->fence_deps.submit_fence)
+			w->eb.flags |= I915_EXEC_FENCE_SUBMIT;
+		else
+			w->eb.flags |= I915_EXEC_FENCE_IN;
+
 		w->eb.rsvd2 = wrk->steps[tgt].emit_fence;
 	}
 
diff --git a/benchmarks/wsim/README b/benchmarks/wsim/README
index 205cd6c93afb..4786f116b4ac 100644
--- a/benchmarks/wsim/README
+++ b/benchmarks/wsim/README
@@ -114,6 +114,23 @@ runnable. When the second RCS batch completes the standalone fence is signaled
 which allows the two VCS batches to be executed. Finally we wait until the both
 VCS batches have completed before starting the (optional) next iteration.
 
+Submit fences
+-------------
+
+Submit fences are a type of input fence which are signalled when the originating
+batch buffer is submitted to the GPU. (In contrary to normal sync fences, which
+are signalled when completed.)
+
+Submit fences have the identical syntax as the sync fences with the lower-case
+'s' being used to select them. Eg:
+
+  1.RCS.500-1000.0.0
+  1.VCS1.3000.s-1.0
+  1.VCS2.3000.s-2.0
+
+Here VCS1 and VCS2 batches will only be submitted for executing once the RCS
+batch enters the GPU.
+
 Context priority
 ----------------
 
-- 
2.19.1

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  parent reply	other threads:[~2019-05-08 12:10 UTC|newest]

Thread overview: 64+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-05-08 12:10 [igt-dev] [PATCH i-g-t 00/21] Media scalability tooling Tvrtko Ursulin
2019-05-08 12:10 ` [igt-dev] [PATCH i-g-t 01/21] scripts/trace.pl: Fix after intel_engine_notify removal Tvrtko Ursulin
2019-05-08 12:17   ` Chris Wilson
2019-05-09  9:27     ` [Intel-gfx] " Tvrtko Ursulin
2019-05-10 12:33   ` Chris Wilson
2019-05-13 12:16     ` Tvrtko Ursulin
2019-05-08 12:10 ` [igt-dev] [PATCH i-g-t 02/21] headers: bump Tvrtko Ursulin
2019-05-08 12:10 ` [igt-dev] [PATCH i-g-t 03/21] trace.pl: Virtual engine support Tvrtko Ursulin
2019-05-10 12:52   ` Chris Wilson
2019-05-13 12:30     ` Tvrtko Ursulin
2019-05-08 12:10 ` [igt-dev] [PATCH i-g-t 04/21] trace.pl: Virtual engine preemption support Tvrtko Ursulin
2019-05-10 12:55   ` [igt-dev] [Intel-gfx] " Chris Wilson
2019-05-13 12:38     ` Tvrtko Ursulin
2019-05-08 12:10 ` [Intel-gfx] [PATCH i-g-t 05/21] wsim/media-bench: i915 balancing Tvrtko Ursulin
2019-05-10 13:14   ` [igt-dev] " Chris Wilson
2019-05-13 12:41     ` Tvrtko Ursulin
2019-05-13 12:54       ` Chris Wilson
2019-05-10 13:23   ` [Intel-gfx] " Chris Wilson
2019-05-08 12:10 ` [igt-dev] [PATCH i-g-t 06/21] gem_wsim: Use IGT uapi headers Tvrtko Ursulin
2019-05-10 13:15   ` Chris Wilson
2019-05-08 12:10 ` [igt-dev] [PATCH i-g-t 07/21] gem_wsim: Factor out common error handling Tvrtko Ursulin
2019-05-10 13:15   ` Chris Wilson
2019-05-08 12:10 ` [igt-dev] [PATCH i-g-t 08/21] gem_wsim: More wsim_err Tvrtko Ursulin
2019-05-10 13:16   ` [Intel-gfx] " Chris Wilson
2019-05-08 12:10 ` Tvrtko Ursulin [this message]
2019-05-10 13:18   ` [igt-dev] [PATCH i-g-t 09/21] gem_wsim: Submit fence support Chris Wilson
2019-05-08 12:10 ` [Intel-gfx] [PATCH i-g-t 10/21] gem_wsim: Extract str to engine lookup Tvrtko Ursulin
2019-05-10 13:20   ` [igt-dev] " Chris Wilson
2019-05-13 13:08     ` Tvrtko Ursulin
2019-05-08 12:10 ` [Intel-gfx] [PATCH i-g-t 11/21] gem_wsim: Engine map support Tvrtko Ursulin
2019-05-10 13:26   ` [igt-dev] " Chris Wilson
2019-05-13 13:18     ` Tvrtko Ursulin
2019-05-13 13:29       ` Chris Wilson
2019-05-13 13:40         ` Tvrtko Ursulin
2019-05-08 12:10 ` [igt-dev] [PATCH i-g-t 12/21] gem_wsim: Save some lines by changing to implicit NULL checking Tvrtko Ursulin
2019-05-10 13:28   ` Chris Wilson
2019-05-08 12:10 ` [Intel-gfx] [PATCH i-g-t 13/21] gem_wsim: Compact int command parsing with a macro Tvrtko Ursulin
2019-05-10 13:29   ` [igt-dev] " Chris Wilson
2019-05-13 13:24     ` Tvrtko Ursulin
2019-05-08 12:10 ` [igt-dev] [PATCH i-g-t 14/21] gem_wsim: Engine map load balance command Tvrtko Ursulin
2019-05-10 13:31   ` Chris Wilson
2019-05-15 11:44     ` Tvrtko Ursulin
2019-05-15 11:48       ` Chris Wilson
2019-05-15 11:55         ` Tvrtko Ursulin
2019-05-08 12:10 ` [Intel-gfx] [PATCH i-g-t 15/21] gem_wsim: Engine bond command Tvrtko Ursulin
2019-05-10 13:36   ` [igt-dev] " Chris Wilson
2019-05-13 13:28     ` Tvrtko Ursulin
2019-05-08 12:10 ` [igt-dev] [PATCH i-g-t 16/21] gem_wsim: Some more example workloads Tvrtko Ursulin
2019-05-08 12:27   ` Chris Wilson
2019-05-08 13:50     ` Tvrtko Ursulin
2019-05-08 13:56       ` Chris Wilson
2019-05-08 14:16         ` Tvrtko Ursulin
2019-05-10 13:37   ` Chris Wilson
2019-05-08 12:10 ` [igt-dev] [PATCH i-g-t 17/21] gem_wsim: Infinite batch support Tvrtko Ursulin
2019-05-10 13:48   ` Chris Wilson
2019-05-13 13:59     ` Tvrtko Ursulin
2019-05-13 14:11       ` Chris Wilson
2019-05-08 12:10 ` [igt-dev] [PATCH i-g-t 18/21] gem_wsim: Command line switch for specifying low slice count workloads Tvrtko Ursulin
2019-05-08 12:10 ` [igt-dev] [PATCH i-g-t 19/21] gem_wsim: Per context SSEU control Tvrtko Ursulin
2019-05-14 21:53   ` Chris Wilson
2019-05-08 12:10 ` [igt-dev] [PATCH i-g-t 20/21] gem_wsim: Allow RCS virtual engine with " Tvrtko Ursulin
2019-05-08 12:10 ` [igt-dev] [PATCH i-g-t 21/21] tests/i915_query: Engine discovery tests Tvrtko Ursulin
2019-05-08 12:53 ` [igt-dev] ✓ Fi.CI.BAT: success for Media scalability tooling (rev2) Patchwork
2019-05-08 16:01 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork

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