[igt-dev] [RFC v2 23/43] tests/i915/gem_exec_nop: use the gem_engine_topology library

Ramalingam C
2019-06-21T10:01:41Z

tests/i915/gem_exec_nop.c | 119 ++++++++++++++++++++------------------
1 file changed, 63 insertions(+), 56 deletions(-)

diff --git a/tests/i915/gem_exec_nop.c b/tests/i915/gem_exec_nop.c
index 8922685af357..937ec01433b4 100644
--- a/tests/i915/gem_exec_nop.c
+++ b/tests/i915/gem_exec_nop.c
@@ -66,7 +66,8 @@ static double elapsed(const struct timespec *start, const struct timespec *end)
(end->tv_nsec - start->tv_nsec)*1e-9);
}

-static double nop_on_ring(int fd, uint32_t handle, unsigned ring_id,
+static double nop_on_ring(int fd, uint32_t handle,
+ const struct intel_execution_engine2 *e,
int timeout, unsigned long *out)
{
struct drm_i915_gem_execbuffer2 execbuf;
@@ -80,11 +81,11 @@ static double nop_on_ring(int fd, uint32_t handle, unsigned ring_id,
memset(&execbuf, 0, sizeof(execbuf));
execbuf.buffers_ptr = to_user_pointer(&obj);
execbuf.buffer_count = 1;
- execbuf.flags = ring_id;
+ execbuf.flags = e->flags;
execbuf.flags |= LOCAL_I915_EXEC_HANDLE_LUT;
execbuf.flags |= LOCAL_I915_EXEC_NO_RELOC;
if (__gem_execbuf(fd, &execbuf)) {
- execbuf.flags = ring_id;
+ execbuf.flags = e->flags;
gem_execbuf(fd, &execbuf);
}
intel_detect_and_clear_missed_interrupts(fd);
@@ -104,7 +105,8 @@ static double nop_on_ring(int fd, uint32_t handle, unsigned ring_id,
return elapsed(&start, &now);
}

-static void poll_ring(int fd, unsigned engine, const char *name, int timeout)
+static void poll_ring(int fd, const struct intel_execution_engine2 *e,
+ const char *name, int timeout)
{
const int gen = intel_gen(intel_get_drm_devid(fd));
const uint32_t MI_ARB_CHK = 0x5 << 23;
@@ -121,8 +123,8 @@ static void poll_ring(int fd, unsigned engine, const char *name, int timeout)
if (gen == 4 || gen == 5)
flags |= I915_EXEC_SECURE;

- gem_require_ring(fd, engine);
- igt_require(gem_can_store_dword(fd, engine));
+ gem_require_ring(fd, e->flags);
+ igt_require(gem_class_can_store_dword(fd, e->class));

memset(&obj, 0, sizeof(obj));
obj.handle = gem_create(fd, 4096);
@@ -186,7 +188,7 @@ static void poll_ring(int fd, unsigned engine, const char *name, int timeout)
memset(&execbuf, 0, sizeof(execbuf));
execbuf.buffers_ptr = to_user_pointer(&obj);
execbuf.buffer_count = 1;
- execbuf.flags = engine | flags;
+ execbuf.flags = e->flags | flags;

cycles = 0;
do {
@@ -222,7 +224,8 @@ static void poll_sequential(int fd, const char *name, int timeout)
struct drm_i915_gem_exec_object2 obj[2];
struct drm_i915_gem_relocation_entry reloc[4], *r;
uint32_t *bbe[2], *state, *batch;
- unsigned engines[16], nengine, engine, flags;
+ unsigned engines[16], nengine, flags;
+ const struct intel_execution_engine2 *e;
struct timespec tv = {};
unsigned long cycles;
uint64_t elapsed;
@@ -233,11 +236,11 @@ static void poll_sequential(int fd, const char *name, int timeout)
flags |= I915_EXEC_SECURE;

nengine = 0;
- for_each_physical_engine(fd, engine) {
- if (!gem_can_store_dword(fd, engine))
+ __for_each_physical_engine(fd, e) {
+ if (!gem_class_can_store_dword(fd, e->class))
continue;

- engines[nengine++] = engine;
+ engines[nengine++] = e->flags;
}
igt_require(nengine);

@@ -342,20 +345,22 @@ static void poll_sequential(int fd, const char *name, int timeout)
}

static void single(int fd, uint32_t handle,
- unsigned ring_id, const char *ring_name)
+ const struct intel_execution_engine2 *e,
+ const char *ring_name)
{
double time;
unsigned long count;

- gem_require_ring(fd, ring_id);
+ gem_require_ring(fd, e->flags);

- time = nop_on_ring(fd, handle, ring_id, 20, &count);
+ time = nop_on_ring(fd, handle, e, 20, &count);
igt_info("%s: %'lu cycles: %.3fus\n",
ring_name, count, time*1e6 / count);
}

static double
-stable_nop_on_ring(int fd, uint32_t handle, unsigned int engine,
+stable_nop_on_ring(int fd, uint32_t handle,
+ const struct intel_execution_engine2 *e,
int timeout, int reps)
{
igt_stats_t s;
@@ -370,7 +375,7 @@ stable_nop_on_ring(int fd, uint32_t handle, unsigned int engine,
unsigned long count;
double time;

- time = nop_on_ring(fd, handle, engine, timeout, &count);
+ time = nop_on_ring(fd, handle, e, timeout, &count);
igt_stats_push_float(&s, time / count);
}

@@ -432,20 +437,20 @@ static void parallel(int fd, uint32_t handle, int timeout)
unsigned engines[16];
const char *names[16];
unsigned nengine;
- unsigned engine;
+ const struct intel_execution_engine2 *e;
unsigned long count;
double time, sum;

sum = 0;
nengine = 0;
- for_each_physical_engine(fd, engine) {
- engines[nengine] = engine;
- names[nengine] = e__->name;
+ __for_each_physical_engine(fd, e) {
+ engines[nengine] = e->flags;
+ names[nengine] = e->name;
nengine++;

- time = nop_on_ring(fd, handle, engine, 1, &count) / count;
+ time = nop_on_ring(fd, handle, e, 1, &count) / count;
sum += time;
- igt_debug("%s: %.3fus\n", e__->name, 1e6*time);
+ igt_debug("%s: %.3fus\n", e->name, 1e6*time);
}
igt_require(nengine);
igt_info("average (individually): %.3fus\n", sum/nengine*1e6);
@@ -491,25 +496,25 @@ static void series(int fd, uint32_t handle, int timeout)
{
struct drm_i915_gem_execbuffer2 execbuf;
struct drm_i915_gem_exec_object2 obj;
+ const struct intel_execution_engine2 *e;
struct timespec start, now, sync;
unsigned engines[16];
unsigned nengine;
- unsigned engine;
unsigned long count;
double time, max = 0, min = HUGE_VAL, sum = 0;
const char *name;

nengine = 0;
- for_each_physical_engine(fd, engine) {
- time = nop_on_ring(fd, handle, engine, 1, &count) / count;
+ __for_each_physical_engine(fd, e) {
+ time = nop_on_ring(fd, handle, e, 1, &count) / count;
if (time > max) {
- name = e__->name;
+ name = e->name;
max = time;
}
if (time < min)
min = time;
sum += time;
- engines[nengine++] = engine;
+ engines[nengine++] = e->flags;
}
igt_require(nengine);
igt_info("Maximum execution latency on %s, %.3fus, min %.3fus, total %.3fus per cycle, average %.3fus\n",
@@ -582,11 +587,12 @@ static void sequential(int fd, uint32_t handle, unsigned flags, int timeout)
const int ncpus = flags & FORKED ? sysconf(_SC_NPROCESSORS_ONLN) : 1;
struct drm_i915_gem_execbuffer2 execbuf;
struct drm_i915_gem_exec_object2 obj[2];
+ const struct intel_execution_engine2 *e;
unsigned engines[16];
unsigned nengine;
double *results;
double time, sum;
- unsigned n;
+ int n;

gem_require_contexts(fd);

@@ -595,14 +601,14 @@ static void sequential(int fd, uint32_t handle, unsigned flags, int timeout)

nengine = 0;
sum = 0;
- for_each_physical_engine(fd, n) {
+ __for_each_physical_engine(fd, e) {
unsigned long count;

- time = nop_on_ring(fd, handle, n, 1, &count) / count;
+ time = nop_on_ring(fd, handle, e, 1, &count) / count;
sum += time;
- igt_debug("%s: %.3fus\n", e__->name, 1e6*time);
+ igt_debug("%s: %.3fus\n", e->name, 1e6*time);

- engines[nengine++] = n;
+ engines[nengine++] = e->flags;
}
igt_require(nengine);
igt_info("Total (individual) execution latency %.3fus per cycle\n",
@@ -710,10 +716,11 @@ static bool fence_wait(int fence)
}

static void fence_signal(int fd, uint32_t handle,
- unsigned ring_id, const char *ring_name,
- int timeout)
+ const struct intel_execution_engine2 *e,
+ const char *ring_name, int timeout)
{
#define NFENCES 512
+ const struct intel_execution_engine2 *other;
struct drm_i915_gem_execbuffer2 execbuf;
struct drm_i915_gem_exec_object2 obj;
struct timespec start, now;
@@ -725,12 +732,12 @@ static void fence_signal(int fd, uint32_t handle,
igt_require(gem_has_exec_fence(fd));

nengine = 0;
- if (ring_id == ALL_ENGINES) {
- for_each_physical_engine(fd, n)
- engines[nengine++] = n;
+ if (!e) {
+ __for_each_physical_engine(fd, other)
+ engines[nengine++] = other->flags;
} else {
- gem_require_ring(fd, ring_id);
- engines[nengine++] = ring_id;
+ gem_require_ring(fd, e->flags);
+ engines[nengine++] = e->flags;
}
igt_require(nengine);

@@ -754,14 +761,14 @@ static void fence_signal(int fd, uint32_t handle,
clock_gettime(CLOCK_MONOTONIC, &start);
do {
for (int loop = 0; loop < 1024; loop++) {
- for (int e = 0; e < nengine; e++) {
+ for (int i = 0; i < nengine; i++) {
if (fences[n] != -1) {
igt_assert(fence_wait(fences[n]));
close(fences[n]);
}

execbuf.flags &= ~ENGINE_FLAGS;
- execbuf.flags |= engines[e];
+ execbuf.flags |= engines[i];
gem_execbuf_wr(fd, &execbuf);

/* Enable signaling by doing a poll() */
@@ -787,7 +794,8 @@ static void fence_signal(int fd, uint32_t handle,
}

static void preempt(int fd, uint32_t handle,
- unsigned ring_id, const char *ring_name)
+ const struct intel_execution_engine2 *e,
+ const char *ring_name)
{
struct drm_i915_gem_execbuffer2 execbuf;
struct drm_i915_gem_exec_object2 obj;
@@ -795,7 +803,7 @@ static void preempt(int fd, uint32_t handle,
unsigned long count;
uint32_t ctx[2];

- gem_require_ring(fd, ring_id);
+ gem_require_ring(fd, e->flags);

ctx[0] = gem_context_create(fd);
gem_context_set_priority(fd, ctx[0], MIN_PRIO);
@@ -809,11 +817,11 @@ static void preempt(int fd, uint32_t handle,
memset(&execbuf, 0, sizeof(execbuf));
execbuf.buffers_ptr = to_user_pointer(&obj);
execbuf.buffer_count = 1;
- execbuf.flags = ring_id;
+ execbuf.flags = e->flags;
execbuf.flags |= LOCAL_I915_EXEC_HANDLE_LUT;
execbuf.flags |= LOCAL_I915_EXEC_NO_RELOC;
if (__gem_execbuf(fd, &execbuf)) {
- execbuf.flags = ring_id;
+ execbuf.flags = e->flags;
gem_execbuf(fd, &execbuf);
}
execbuf.rsvd1 = ctx[1];
@@ -825,7 +833,7 @@ static void preempt(int fd, uint32_t handle,
igt_spin_t *spin =
__igt_spin_new(fd,
.ctx = ctx[0],
- .engine = ring_id);
+ .engine = e->flags);

for (int loop = 0; loop < 1024; loop++)
gem_execbuf(fd, &execbuf);
@@ -846,7 +854,7 @@ static void preempt(int fd, uint32_t handle,

igt_main
{
- const struct intel_execution_engine *e;
+ const struct intel_execution_engine2 *e;
uint32_t handle = 0;
int device = -1;

@@ -873,15 +881,15 @@ igt_main
igt_subtest("basic-sequential")
sequential(device, handle, 0, 5);

- for (e = intel_execution_engines; e->name; e++) {
+ __for_each_physical_engine(device, e) {
igt_subtest_f("%s", e->name)
- single(device, handle, e->exec_id | e->flags, e->name);
+ single(device, handle, e, e->name);
igt_subtest_f("signal-%s", e->name)
- fence_signal(device, handle, e->exec_id | e->flags, e->name, 5);
+ fence_signal(device, handle, e, e->name, 5);
}

igt_subtest("signal-all")
- fence_signal(device, handle, ALL_ENGINES, "all", 150);
+ fence_signal(device, handle, NULL, "all", 150);

igt_subtest("series")
series(device, handle, 150);
@@ -908,9 +916,9 @@ igt_main
igt_require(gem_scheduler_has_preemption(device));
}

- for (e = intel_execution_engines; e->name; e++) {
+ __for_each_physical_engine(device, e) {
igt_subtest_f("preempt-%s", e->name)
- preempt(device, handle, e->exec_id | e->flags, e->name);
+ preempt(device, handle, e, e->name);
}
}

@@ -919,11 +927,10 @@ igt_main
igt_device_set_master(device);
}

- for (e = intel_execution_engines; e->name; e++) {
+ __for_each_physical_engine(device, e) {
/* Requires master for STORE_DWORD on gen4/5 */
igt_subtest_f("poll-%s", e->name)
- poll_ring(device,
- e->exec_id | e->flags, e->name, 20);
+ poll_ring(device, e, e->name, 20);
}

igt_subtest("poll-sequential")