[Intel-gfx] [PATCH i-g-t 5/6] i915/gem_mocs_settings: Fudge gen11:vcs2 mocs register base

Chris Wilson
2019-09-02T04:15:47Z

On gen11 CI, we have vcs2 available which has a different base to gen9
vcs1. Gloss over the discrepancy while a proper fix is sought.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111330
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
tests/i915/gem_mocs_settings.c | 28 ++++++++++++++++++++++------
1 file changed, 22 insertions(+), 6 deletions(-)

diff --git a/tests/i915/gem_mocs_settings.c b/tests/i915/gem_mocs_settings.c
index 3ad941491..06240877e 100644
--- a/tests/i915/gem_mocs_settings.c
+++ b/tests/i915/gem_mocs_settings.c
@@ -62,6 +62,7 @@ static const char * const test_modes[] = {
#define GEN9_MFX0_MOCS_0 (0xc900) /* Media 0 MOCS base register*/
#define GEN9_MFX1_MOCS_0 (0xcA00) /* Media 1 MOCS base register*/
#define GEN9_VEBOX_MOCS_0 (0xcB00) /* Video MOCS base register*/
+#define GEN11_MFX2_MOCS_0 (0x10000)
#define GEN9_BLT_MOCS_0 (0xcc00) /* Blitter MOCS base register*/
#define GEN12_GLOBAL_MOCS (0x4000)
#define ICELAKE_MOCS_PTE {0x00000004, 0x0030, 0x1}
@@ -216,12 +217,27 @@ static uint32_t get_engine_base(int fd, uint32_t engine)
return GEN12_GLOBAL_MOCS;

switch (engine) {
- case LOCAL_I915_EXEC_BSD1: return GEN9_MFX0_MOCS_0;
- case LOCAL_I915_EXEC_BSD2: return GEN9_MFX1_MOCS_0;
- case I915_EXEC_RENDER: return GEN9_GFX_MOCS_0;
- case I915_EXEC_BLT: return GEN9_BLT_MOCS_0;
- case I915_EXEC_VEBOX: return GEN9_VEBOX_MOCS_0;
- default: return 0;
+ case LOCAL_I915_EXEC_BSD1:
+ return GEN9_MFX0_MOCS_0;
+
+ case LOCAL_I915_EXEC_BSD2:
+ if (intel_gen(intel_get_drm_devid(fd)) >= 11)
+ /* i915_query to find correct HW base */
+ return GEN11_MFX2_MOCS_0;
+ else
+ return GEN9_MFX1_MOCS_0;
+
+ case I915_EXEC_RENDER:
+ return GEN9_GFX_MOCS_0;
+
+ case I915_EXEC_BLT:
+ return GEN9_BLT_MOCS_0;
+
+ case I915_EXEC_VEBOX:
+ return GEN9_VEBOX_MOCS_0;
+
+ default:
+ return 0;
}
}

--
2.23.0

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