[igt-dev] [PATCH i-g-t 5/6] HACK: tools/intel_scaler_coef: Test chv plane scaler programmable coefficients

[Ville Syrjala <ville.syrjala@linux.intel.com>]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

chv pipe B primary plane has a scaler that has programmable
coefficients. Add some code to figure out how this stuff works.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 tools/intel_scaler_coef.c | 382 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 382 insertions(+)

diff --git a/tools/intel_scaler_coef.c b/tools/intel_scaler_coef.c
index de6872a91545..fbac5e7a9c3e 100644
--- a/tools/intel_scaler_coef.c
+++ b/tools/intel_scaler_coef.c
@@ -1368,6 +1368,386 @@ static void cnl_program(struct filter *f, int pipe)
 	intel_register_access_fini(&mmio_data);
 }
 
+#define VLV_DISPLAY_BASE 0x180000
+
+#define PCPSXCONFIG(sprite)            (VLV_DISPLAY_BASE + 0x6d000 + (sprite) * 0x1000)
+#define  PCPSX_SCALER_EN               (1 << 0)
+#define PCPSXHS_CNTL(sprite)           (VLV_DISPLAY_BASE + 0x6d100 + (sprite) * 0x1000)
+#define PCPSXHS_H(sprite)              (VLV_DISPLAY_BASE + 0x6d104 + (sprite) * 0x1000)
+#define PCPSXHS_W(sprite)              (VLV_DISPLAY_BASE + 0x6d108 + (sprite) * 0x1000)
+#define PCPSXHS_NBP(sprite)            (VLV_DISPLAY_BASE + 0x6d10c + (sprite) * 0x1000)
+#define PCPSXHS_ISF(sprite)            (VLV_DISPLAY_BASE + 0x6d110 + (sprite) * 0x1000)
+#define PCPSXHS_PC(sprite)             (VLV_DISPLAY_BASE + 0x6d114 + (sprite) * 0x1000)
+#define PCPSXHS_PM(sprite, phase, w)   (VLV_DISPLAY_BASE + 0x6d200 + (sprite) * 0x1000 + (phase) * 16 + (w) * 4)
+#define PCPSXHS_APM(sprite, phase, w)  (VLV_DISPLAY_BASE + 0x6d300 + (sprite) * 0x1000 + (phase) * 16 + (w) * 4)
+#define PCPSXVS_CNTL(sprite)           (VLV_DISPLAY_BASE + 0x6d500 + (sprite) * 0x1000)
+#define PCPSXVS_H(sprite)              (VLV_DISPLAY_BASE + 0x6d504 + (sprite) * 0x1000)
+#define PCPSXVS_W(sprite)              (VLV_DISPLAY_BASE + 0x6d508 + (sprite) * 0x1000)
+#define PCPSXVS_ISF(sprite)            (VLV_DISPLAY_BASE + 0x6d510 + (sprite) * 0x1000)
+#define PCPSXVS_PC(sprite)             (VLV_DISPLAY_BASE + 0x6d514 + (sprite) * 0x1000)
+#define PCPSXVS_PM(sprite, phase, w)   (VLV_DISPLAY_BASE + 0x6d600 + (sprite) * 0x1000 + (phase) * 8 + (w) * 4)
+#define PCPSXVS_APM(sprite, phase, w)  (VLV_DISPLAY_BASE + 0x6d700 + (sprite) * 0x1000 + (phase) * 8 + (w) * 4)
+
+#define SPCTL (VLV_DISPLAY_BASE + 0x72380)
+#define PRIMCTL (VLV_DISPLAY_BASE + 0x71180)
+#define  PLANE_EN               (1u << 31)
+
+#define SPPOS (VLV_DISPLAY_BASE + 0x7238c)
+#define PRIMPOS (VLV_DISPLAY_BASE + 0x61a08)
+
+#define SPSIZE (VLV_DISPLAY_BASE + 0x72390)
+#define PRIMSIZE (VLV_DISPLAY_BASE + 0x61a0c)
+
+static bool chv_plane_enabled(bool sprite)
+{
+	uint32_t tmp;
+
+	if (sprite)
+		tmp = I915_READ(SPCTL);
+	else
+		tmp = I915_READ(PRIMCTL);
+
+	return tmp & PLANE_EN;
+}
+
+static void chv_set_plane_size(const struct rect *r,
+			       bool sprite)
+{
+	if (sprite)
+		I915_WRITE(SPPOS, r->y << 16 | r->x);
+	else
+		I915_WRITE(PRIMPOS, r->y << 16 | r->x);
+
+	if (sprite)
+		I915_WRITE(SPSIZE, (r->h - 1) << 16 | (r->w - 1));
+	else
+		I915_WRITE(PRIMSIZE, (r->h - 1) << 16 | (r->w - 1));
+}
+
+static void chv_get_plane_size(struct rect *r,
+			       bool sprite)
+{
+	uint32_t tmp;
+
+	if (sprite)
+		tmp = I915_READ(SPPOS);
+	else
+		tmp = I915_READ(PRIMPOS);
+
+	r->x = tmp & 0xffff;
+	r->y = tmp >> 16;
+
+	if (sprite)
+		tmp = I915_READ(SPSIZE);
+	else
+		tmp = I915_READ(PRIMSIZE);
+
+	r->w = (tmp & 0xffff) + 1;
+	r->h = (tmp >> 16) + 1;
+}
+
+static int chv_coef_index(const struct filter *f, int p, int t)
+{
+	assert(f->config.nphases/2 == 16);
+	assert(f->config.ntaps == 9 ||
+	       f->config.ntaps == 5);
+
+	return nhwtaps(f) * p + tap_to_hwtap(f, t);
+}
+
+static void chv_coefs(struct filter *f, uint16_t coef[])
+{
+	for (int p = 0; p < f->config.nphases/2; p++) {
+		const double *coefs = f->phases[p].coefs;
+
+		for (int t = 0; t < f->config.ntaps; t++) {
+			union chv_coef_reg r;
+			int i = chv_coef_index(f, p, t);
+
+			chv_coef_to_reg(f, coefs[t], &r);
+
+			coef[i] = r.reg;
+		}
+	}
+}
+
+static void chv_rgb_hcoefs(struct filter *f, uint16_t coef[])
+{
+	f->config = configs[FORMAT_CHV_HORZ];
+
+	f->phase_offset = 0.5 / f->config.nphases;
+
+	generate_filter(f);
+	update_filter(f);
+	fixup_filter(f);
+
+	printf("chv rgb horz\n");
+	print_filter(f);
+	hw_print_filter(f);
+	print_c_filter(f);
+
+	chv_coefs(f, coef);
+}
+
+static void chv_alpha_hcoefs(struct filter *f, uint16_t coef[])
+{
+	f->config = configs[FORMAT_CHV_HORZ];
+	f->filter = &filter_funcs[1];
+	f->window = &window_funcs[0];
+	f->phase_offset = 0.5 / f->config.nphases;
+	f->mode = MODE_LOWPASS;
+
+	generate_filter(f);
+	update_filter(f);
+	fixup_filter(f);
+
+	printf("chv alpha horz\n");
+	print_filter(f);
+	hw_print_filter(f);
+	print_c_filter(f);
+
+	chv_coefs(f, coef);
+}
+
+static void chv_rgb_vcoefs(struct filter *f, uint16_t coef[])
+{
+	f->config = configs[FORMAT_CHV_VERT];
+
+	f->phase_offset = 0.5 / f->config.nphases;
+
+	generate_filter(f);
+	update_filter(f);
+	fixup_filter(f);
+
+	printf("chv rgb vert\n");
+	print_filter(f);
+	hw_print_filter(f);
+	print_c_filter(f);
+
+	chv_coefs(f, coef);
+}
+
+static void chv_alpha_vcoefs(struct filter *f, uint16_t coef[])
+{
+	f->config = configs[FORMAT_CHV_VERT];
+	f->filter = &filter_funcs[1];
+	f->window = &window_funcs[0];
+	f->phase_offset = 0.5 / f->config.nphases;
+	f->mode = MODE_LOWPASS;
+
+	generate_filter(f);
+	update_filter(f);
+	fixup_filter(f);
+
+	printf("chv alpha vert\n");
+	print_filter(f);
+	hw_print_filter(f);
+	print_c_filter(f);
+
+	chv_coefs(f, coef);
+}
+
+static void chv_program_rgb_horz(bool sprite, const uint16_t coef[])
+{
+	for (int p = 0; p < 16; p++) {
+		uint32_t tmp;
+
+		tmp = coef[2] << 24 | coef[1] << 12 | coef[0];
+		I915_WRITE(PCPSXHS_PM(sprite, p, 0), tmp);
+
+		tmp = coef[5] << 28 | coef[4] << 16 | coef[3] << 4 | coef[2] >> 8;
+		I915_WRITE(PCPSXHS_PM(sprite, p, 1), tmp);
+
+		tmp = coef[7] << 20 | coef[6] << 8 | coef[5] >> 4;
+		I915_WRITE(PCPSXHS_PM(sprite, p, 2), tmp);
+
+		tmp = coef[8];
+		I915_WRITE(PCPSXHS_PM(sprite, p, 3), tmp);
+
+		coef += 9;
+	}
+}
+
+static void chv_program_alpha_horz(bool sprite, const uint16_t coef[])
+{
+	for (int p = 0; p < 16; p++) {
+		uint32_t tmp;
+
+		tmp = coef[2] << 24 | coef[1] << 12 | coef[0];
+		I915_WRITE(PCPSXHS_APM(sprite, p, 0), tmp);
+
+		tmp = coef[5] << 28 | coef[4] << 16 | coef[3] << 4 | coef[2] >> 8;
+		I915_WRITE(PCPSXHS_APM(sprite, p, 1), tmp);
+
+		tmp = coef[7] << 20 | coef[6] << 8 | coef[5] >> 4;
+		I915_WRITE(PCPSXHS_APM(sprite, p, 2), tmp);
+
+		tmp = coef[8];
+		I915_WRITE(PCPSXHS_APM(sprite, p, 3), tmp);
+
+		coef += 9;
+	}
+}
+
+static void chv_program_rgb_vert(bool sprite, const uint16_t coef[])
+{
+	for (int p = 0; p < 16; p++) {
+		uint32_t tmp;
+
+		tmp = coef[2] << 24 | coef[1] << 12 | coef[0];
+		I915_WRITE(PCPSXVS_PM(sprite, p, 0), tmp);
+
+		tmp = coef[4] << 16 | coef[3] << 4 | coef[2] >> 8;
+		I915_WRITE(PCPSXVS_PM(sprite, p, 1), tmp);
+
+		coef += 5;
+	}
+}
+
+static void chv_program_alpha_vert(bool sprite, const uint16_t coef[])
+{
+	for (int p = 0; p < 16; p++) {
+		uint32_t tmp;
+
+		tmp = coef[2] << 24 | coef[1] << 12 | coef[0];
+		I915_WRITE(PCPSXVS_APM(sprite, p, 0), tmp);
+
+		tmp = coef[4] << 16 | coef[3] << 4 | coef[2] >> 8;
+		I915_WRITE(PCPSXVS_APM(sprite, p, 1), tmp);
+
+		coef += 5;
+	}
+}
+
+static unsigned int chv_initial_phase(const struct filter *f)
+{
+	return ((f->config.nphases - 1) << 16) / (f->config.nphases * 2);
+}
+
+static unsigned int chv_vert_read_offset(int ntaps)
+{
+	/* 5 taps -> -2 */
+	return 0x10 | (ntaps / 2);
+}
+
+static void chv_program(struct filter *f)
+{
+	struct filter af = {};
+	struct intel_mmio_data mmio_data;
+	uint16_t hcoef[9*16] = {};
+	uint16_t vcoef[5*16] = {};
+	bool sprite = false;
+	uint32_t devid;
+	struct rect orig_dst;
+	struct rect dst;
+	struct rect src;
+
+	devid = intel_get_pci_device()->device_id;
+
+	if (!IS_CHERRYVIEW(devid))
+		return;
+
+	intel_register_access_init(&mmio_data, intel_get_pci_device(), 0, -1);
+
+	if (!chv_plane_enabled(sprite))
+		goto out;
+
+	chv_get_plane_size(&src, sprite);
+
+	dst = src;
+	orig_dst = dst;
+
+	dst.x = 16;
+	dst.y = 16;
+	dst.w -= 32;
+	dst.h -= 32;
+
+	chv_rgb_hcoefs(f, hcoef);
+
+	I915_WRITE(PCPSXHS_CNTL(sprite), 0);
+	I915_WRITE(PCPSXHS_H(sprite), src.h);
+	I915_WRITE(PCPSXHS_W(sprite), (dst.w << 16) | src.w);
+	I915_WRITE(PCPSXHS_NBP(sprite), chv_vert_read_offset(5) << 8);
+	I915_WRITE(PCPSXHS_ISF(sprite), (src.w << 16) / dst.w);
+	I915_WRITE(PCPSXHS_PC(sprite), chv_initial_phase(f) << 8 |
+		   f->config.nphases);
+
+	chv_program_rgb_horz(sprite, hcoef);
+	chv_alpha_hcoefs(&af, hcoef);
+	chv_program_alpha_horz(sprite, hcoef);
+
+	chv_rgb_vcoefs(f, vcoef);
+
+	I915_WRITE(PCPSXVS_CNTL(sprite), 0);
+	I915_WRITE(PCPSXVS_H(sprite), (dst.h << 16) | src.h);
+	I915_WRITE(PCPSXVS_W(sprite), dst.w);
+	I915_WRITE(PCPSXVS_ISF(sprite), (src.h << 16) / dst.h);
+	I915_WRITE(PCPSXVS_PC(sprite), chv_initial_phase(f) << 8 |
+		   f->config.nphases);
+
+	chv_program_rgb_vert(sprite, vcoef);
+	chv_alpha_vcoefs(&af, vcoef);
+	chv_program_alpha_vert(sprite, vcoef);
+
+#if 0
+	I915_READ(PCPSXHS_CNTL(sprite));
+	I915_READ(PCPSXHS_H(sprite));
+	I915_READ(PCPSXHS_W(sprite));
+	I915_READ(PCPSXHS_NBP(sprite));
+	I915_READ(PCPSXHS_ISF(sprite));
+	I915_READ(PCPSXHS_PC(sprite));
+
+	for (int p = 0; p < 16; p++) {
+		printf("p = %d\n", p);
+		I915_READ(PCPSXHS_PM(sprite, p, 0));
+		I915_READ(PCPSXHS_PM(sprite, p, 1));
+		I915_READ(PCPSXHS_PM(sprite, p, 2));
+		I915_READ(PCPSXHS_PM(sprite, p, 3));
+	}
+
+	for (int p = 0; p < 16; p++) {
+		printf("p = %d\n", p);
+		I915_READ(PCPSXHS_APM(sprite, p, 0));
+		I915_READ(PCPSXHS_APM(sprite, p, 1));
+		I915_READ(PCPSXHS_APM(sprite, p, 2));
+		I915_READ(PCPSXHS_APM(sprite, p, 3));
+	}
+
+	I915_READ(PCPSXVS_CNTL(sprite));
+	I915_READ(PCPSXVS_H(sprite));
+	I915_READ(PCPSXVS_W(sprite));
+	I915_READ(PCPSXVS_ISF(sprite));
+	I915_READ(PCPSXVS_PC(sprite));
+
+	for (int p = 0; p < 16; p++) {
+		printf("p = %d\n", p);
+		I915_READ(PCPSXVS_PM(sprite, p, 0));
+		I915_READ(PCPSXVS_PM(sprite, p, 1));
+	}
+
+	for (int p = 0; p < 16; p++) {
+		printf("p = %d\n", p);
+		I915_READ(PCPSXVS_APM(sprite, p, 0));
+		I915_READ(PCPSXVS_APM(sprite, p, 1));
+	}
+#endif
+
+	I915_WRITE(PCPSXCONFIG(sprite), PCPSX_SCALER_EN);
+	chv_set_plane_size(&dst, sprite);
+
+	printf("%dx%d%+d%+d -> %dx%d%+d%+d\n",
+	       src.w, src.h, src.x, src.y,
+	       dst.w, dst.h, dst.x, dst.y);
+
+	sleep(2);
+
+	chv_set_plane_size(&orig_dst, sprite);
+	I915_WRITE(PCPSXCONFIG(sprite), 0);
+
+ out:
+	intel_register_access_fini(&mmio_data);
+}
+
 int main(int argc, char *argv[])
 {
 	const struct option opts[] = {
@@ -1532,6 +1912,8 @@ int main(int argc, char *argv[])
 		cnl_program(&f, 0);
 	if (1)
 		ilk_program(&f, 0);
+	if (1)
+		chv_program(&f);
 
 	return 0;
 }
-- 
2.24.1

_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev