From: "Zbigniew Kempczyński" <zbigniew.kempczynski@intel.com>
To: igt-dev@lists.freedesktop.org
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Subject: [igt-dev] [PATCH i-g-t v4 5/8] lib/gpgpu_fill: libdrm-free gpgpu pipeline creation
Date: Tue, 19 May 2020 10:11:31 +0200 [thread overview]
Message-ID: <20200519081134.24589-6-zbigniew.kempczynski@intel.com> (raw)
In-Reply-To: <20200519081134.24589-1-zbigniew.kempczynski@intel.com>
Provide "v2" pipeline for gpgpu fill for all gens.
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
---
lib/gpgpu_fill.c | 187 +++++++++++++++++++++++++++++++++++++++++++++++
lib/gpgpu_fill.h | 34 +++++++++
2 files changed, 221 insertions(+)
diff --git a/lib/gpgpu_fill.c b/lib/gpgpu_fill.c
index 5660d4c0..49988a36 100644
--- a/lib/gpgpu_fill.c
+++ b/lib/gpgpu_fill.c
@@ -120,6 +120,7 @@ static const uint32_t gen12_gpgpu_kernel[][4] = {
*
*/
+#define PAGE_SIZE 4096
#define BATCH_STATE_SPLIT 2048
/* VFE STATE params */
#define THREADS 1
@@ -178,6 +179,56 @@ gen7_gpgpu_fillfunc(struct intel_batchbuffer *batch,
intel_batchbuffer_reset(batch);
}
+void
+gen7_gpgpu_fillfunc_v2(int i915,
+ struct intel_buf *buf,
+ unsigned x, unsigned y,
+ unsigned width, unsigned height,
+ uint8_t color)
+{
+ struct intel_bb *ibb;
+ uint32_t curbe_buffer, interface_descriptor;
+
+ ibb = intel_bb_create(i915, PAGE_SIZE);
+ intel_bb_add_object(ibb, buf->handle, 0, true);
+
+ intel_bb_ptr_set(ibb, BATCH_STATE_SPLIT);
+
+ /* Fill curbe buffer data */
+ curbe_buffer = gen7_fill_curbe_buffer_data_v2(ibb, color);
+
+ /*
+ * const buffer needs to fill for every thread, but as we have just 1
+ * thread per every group, so need only one curbe data.
+ * For each thread, just use thread group ID for buffer offset.
+ */
+ interface_descriptor =
+ gen7_fill_interface_descriptor_v2(ibb, buf,
+ gen7_gpgpu_kernel,
+ sizeof(gen7_gpgpu_kernel));
+
+ intel_bb_ptr_set(ibb, 0);
+
+ /* GPGPU pipeline */
+ intel_bb_out(ibb, GEN7_PIPELINE_SELECT | PIPELINE_SELECT_GPGPU);
+
+ gen7_emit_state_base_address_v2(ibb);
+ gen7_emit_vfe_state_v2(ibb, THREADS, GEN7_GPGPU_URB_ENTRIES,
+ GPGPU_URB_SIZE, GPGPU_CURBE_SIZE,
+ GEN7_VFE_STATE_GPGPU_MODE);
+ gen7_emit_curbe_load_v2(ibb, curbe_buffer);
+ gen7_emit_interface_descriptor_load_v2(ibb, interface_descriptor);
+ gen7_emit_gpgpu_walk_v2(ibb, x, y, width, height);
+
+ intel_bb_out(ibb, MI_BATCH_BUFFER_END);
+ intel_bb_ptr_align(ibb, 32);
+
+ intel_bb_exec(ibb, intel_bb_offset(ibb),
+ I915_EXEC_DEFAULT | I915_EXEC_NO_RELOC, true);
+
+ intel_bb_destroy(ibb);
+}
+
void
gen8_gpgpu_fillfunc(struct intel_batchbuffer *batch,
const struct igt_buf *dst,
@@ -226,6 +277,54 @@ gen8_gpgpu_fillfunc(struct intel_batchbuffer *batch,
intel_batchbuffer_reset(batch);
}
+void
+gen8_gpgpu_fillfunc_v2(int i915,
+ struct intel_buf *buf,
+ unsigned x, unsigned y,
+ unsigned width, unsigned height,
+ uint8_t color)
+{
+ struct intel_bb *ibb;
+ uint32_t curbe_buffer, interface_descriptor;
+
+ ibb = intel_bb_create(i915, PAGE_SIZE);
+ intel_bb_add_object(ibb, buf->handle, 0, true);
+
+ intel_bb_ptr_set(ibb, BATCH_STATE_SPLIT);
+
+ /*
+ * const buffer needs to fill for every thread, but as we have just 1
+ * thread per every group, so need only one curbe data.
+ * For each thread, just use thread group ID for buffer offset.
+ */
+ curbe_buffer = gen7_fill_curbe_buffer_data_v2(ibb, color);
+
+ interface_descriptor = gen8_fill_interface_descriptor_v2(ibb, buf,
+ gen8_gpgpu_kernel, sizeof(gen8_gpgpu_kernel));
+
+ intel_bb_ptr_set(ibb, 0);
+
+ /* GPGPU pipeline */
+ intel_bb_out(ibb, GEN7_PIPELINE_SELECT | PIPELINE_SELECT_GPGPU);
+
+ gen8_emit_state_base_address_v2(ibb);
+ gen8_emit_vfe_state_v2(ibb, THREADS, GEN8_GPGPU_URB_ENTRIES,
+ GPGPU_URB_SIZE, GPGPU_CURBE_SIZE);
+
+ gen7_emit_curbe_load_v2(ibb, curbe_buffer);
+ gen7_emit_interface_descriptor_load_v2(ibb, interface_descriptor);
+
+ gen8_emit_gpgpu_walk_v2(ibb, x, y, width, height);
+
+ intel_bb_out(ibb, MI_BATCH_BUFFER_END);
+ intel_bb_ptr_align(ibb, 32);
+
+ intel_bb_exec(ibb, intel_bb_offset(ibb),
+ I915_EXEC_DEFAULT | I915_EXEC_NO_RELOC, true);
+
+ intel_bb_destroy(ibb);
+}
+
static void
__gen9_gpgpu_fillfunc(struct intel_batchbuffer *batch,
const struct igt_buf *dst,
@@ -276,6 +375,60 @@ __gen9_gpgpu_fillfunc(struct intel_batchbuffer *batch,
intel_batchbuffer_reset(batch);
}
+
+static void
+__gen9_gpgpu_fillfunc_v2(int i915,
+ struct intel_buf *buf,
+ unsigned x, unsigned y,
+ unsigned width, unsigned height,
+ uint8_t color,
+ const uint32_t kernel[][4], size_t kernel_size)
+{
+ struct intel_bb *ibb;
+ uint32_t curbe_buffer, interface_descriptor;
+
+ ibb = intel_bb_create(i915, PAGE_SIZE);
+ intel_bb_add_object(ibb, buf->handle, 0, true);
+
+ intel_bb_ptr_set(ibb, BATCH_STATE_SPLIT);
+
+ /*
+ * const buffer needs to fill for every thread, but as we have just 1
+ * thread per every group, so need only one curbe data.
+ * For each thread, just use thread group ID for buffer offset.
+ */
+ /* Fill curbe buffer data */
+ curbe_buffer = gen7_fill_curbe_buffer_data_v2(ibb, color);
+
+ interface_descriptor = gen8_fill_interface_descriptor_v2(ibb, buf,
+ kernel,
+ kernel_size);
+
+ intel_bb_ptr_set(ibb, 0);
+
+ /* GPGPU pipeline */
+ intel_bb_out(ibb, GEN7_PIPELINE_SELECT | GEN9_PIPELINE_SELECTION_MASK |
+ PIPELINE_SELECT_GPGPU);
+
+ gen9_emit_state_base_address_v2(ibb);
+
+ gen8_emit_vfe_state_v2(ibb, THREADS, GEN8_GPGPU_URB_ENTRIES,
+ GPGPU_URB_SIZE, GPGPU_CURBE_SIZE);
+
+ gen7_emit_curbe_load_v2(ibb, curbe_buffer);
+ gen7_emit_interface_descriptor_load_v2(ibb, interface_descriptor);
+
+ gen8_emit_gpgpu_walk_v2(ibb, x, y, width, height);
+
+ intel_bb_out(ibb, MI_BATCH_BUFFER_END);
+ intel_bb_ptr_align(ibb, 32);
+
+ intel_bb_exec(ibb, intel_bb_offset(ibb),
+ I915_EXEC_DEFAULT | I915_EXEC_NO_RELOC, true);
+
+ intel_bb_destroy(ibb);
+}
+
void gen9_gpgpu_fillfunc(struct intel_batchbuffer *batch,
const struct igt_buf *dst,
unsigned int x, unsigned int y,
@@ -286,6 +439,18 @@ void gen9_gpgpu_fillfunc(struct intel_batchbuffer *batch,
gen9_gpgpu_kernel, sizeof(gen9_gpgpu_kernel));
}
+void gen9_gpgpu_fillfunc_v2(int i915,
+ struct intel_buf *buf,
+ unsigned x, unsigned y,
+ unsigned width, unsigned height,
+ uint8_t color)
+{
+ __gen9_gpgpu_fillfunc_v2(i915, buf, x, y, width, height, color,
+ gen9_gpgpu_kernel,
+ sizeof(gen9_gpgpu_kernel));
+}
+
+
void gen11_gpgpu_fillfunc(struct intel_batchbuffer *batch,
const struct igt_buf *dst,
unsigned int x, unsigned int y,
@@ -296,6 +461,17 @@ void gen11_gpgpu_fillfunc(struct intel_batchbuffer *batch,
gen11_gpgpu_kernel, sizeof(gen11_gpgpu_kernel));
}
+void gen11_gpgpu_fillfunc_v2(int i915,
+ struct intel_buf *buf,
+ unsigned x, unsigned y,
+ unsigned width, unsigned height,
+ uint8_t color)
+{
+ __gen9_gpgpu_fillfunc_v2(i915, buf, x, y, width, height, color,
+ gen11_gpgpu_kernel,
+ sizeof(gen11_gpgpu_kernel));
+}
+
void gen12_gpgpu_fillfunc(struct intel_batchbuffer *batch,
const struct igt_buf *dst,
unsigned int x, unsigned int y,
@@ -305,3 +481,14 @@ void gen12_gpgpu_fillfunc(struct intel_batchbuffer *batch,
__gen9_gpgpu_fillfunc(batch, dst, x, y, width, height, color,
gen12_gpgpu_kernel, sizeof(gen12_gpgpu_kernel));
}
+
+void gen12_gpgpu_fillfunc_v2(int i915,
+ struct intel_buf *buf,
+ unsigned x, unsigned y,
+ unsigned width, unsigned height,
+ uint8_t color)
+{
+ __gen9_gpgpu_fillfunc_v2(i915, buf, x, y, width, height, color,
+ gen12_gpgpu_kernel,
+ sizeof(gen12_gpgpu_kernel));
+}
diff --git a/lib/gpgpu_fill.h b/lib/gpgpu_fill.h
index da7d646f..a387732b 100644
--- a/lib/gpgpu_fill.h
+++ b/lib/gpgpu_fill.h
@@ -28,6 +28,7 @@
#define GPGPU_FILL_H
#include "intel_batchbuffer.h"
+#include "intel_bufops.h"
void
gen7_gpgpu_fillfunc(struct intel_batchbuffer *batch,
@@ -36,6 +37,13 @@ gen7_gpgpu_fillfunc(struct intel_batchbuffer *batch,
unsigned int width, unsigned int height,
uint8_t color);
+void
+gen7_gpgpu_fillfunc_v2(int i915,
+ struct intel_buf *buf,
+ unsigned x, unsigned y,
+ unsigned width, unsigned height,
+ uint8_t color);
+
void
gen8_gpgpu_fillfunc(struct intel_batchbuffer *batch,
const struct igt_buf *dst,
@@ -43,6 +51,13 @@ gen8_gpgpu_fillfunc(struct intel_batchbuffer *batch,
unsigned int width, unsigned int height,
uint8_t color);
+void
+gen8_gpgpu_fillfunc_v2(int i915,
+ struct intel_buf *buf,
+ unsigned x, unsigned y,
+ unsigned width, unsigned height,
+ uint8_t color);
+
void
gen9_gpgpu_fillfunc(struct intel_batchbuffer *batch,
const struct igt_buf *dst,
@@ -50,6 +65,12 @@ gen9_gpgpu_fillfunc(struct intel_batchbuffer *batch,
unsigned int width, unsigned int height,
uint8_t color);
+void gen9_gpgpu_fillfunc_v2(int i915,
+ struct intel_buf *buf,
+ unsigned x, unsigned y,
+ unsigned width, unsigned height,
+ uint8_t color);
+
void
gen11_gpgpu_fillfunc(struct intel_batchbuffer *batch,
const struct igt_buf *dst,
@@ -57,6 +78,12 @@ gen11_gpgpu_fillfunc(struct intel_batchbuffer *batch,
unsigned int width, unsigned int height,
uint8_t color);
+void gen11_gpgpu_fillfunc_v2(int i915,
+ struct intel_buf *buf,
+ unsigned x, unsigned y,
+ unsigned width, unsigned height,
+ uint8_t color);
+
void
gen12_gpgpu_fillfunc(struct intel_batchbuffer *batch,
const struct igt_buf *dst,
@@ -64,4 +91,11 @@ gen12_gpgpu_fillfunc(struct intel_batchbuffer *batch,
unsigned int width, unsigned int height,
uint8_t color);
+void
+gen12_gpgpu_fillfunc_v2(int i915,
+ struct intel_buf *buf,
+ unsigned x, unsigned y,
+ unsigned width, unsigned height,
+ uint8_t color);
+
#endif /* GPGPU_FILL_H */
--
2.26.0
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev
next prev parent reply other threads:[~2020-05-19 8:11 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-19 8:11 [igt-dev] [PATCH i-g-t v4 0/8] Make gpgpu fill tests libdrm independent Zbigniew Kempczyński
2020-05-19 8:11 ` [igt-dev] [PATCH i-g-t v4 1/8] lib/intel_bufops: Add bufops reference and adapt stride requirement Zbigniew Kempczyński
2020-05-19 8:11 ` [igt-dev] [PATCH i-g-t v4 2/8] lib/rendercopy_bufmgr: Pass alignment during buffer initialization Zbigniew Kempczyński
2020-05-19 8:11 ` [igt-dev] [PATCH i-g-t v4 3/8] lib/intel_batchbuffer: Introduce intel_bb Zbigniew Kempczyński
2020-05-19 8:11 ` [igt-dev] [PATCH i-g-t v4 4/8] lib/gpu_cmds: Add gpgpu pipeline functions based on intel_bb Zbigniew Kempczyński
2020-05-19 8:11 ` Zbigniew Kempczyński [this message]
2020-05-19 8:11 ` [igt-dev] [PATCH i-g-t v4 6/8] lib/intel_batchbuffer: Introduce temporary igt_fillfunc_v2_t Zbigniew Kempczyński
2020-05-19 8:11 ` [igt-dev] [PATCH i-g-t v4 7/8] tests/gem_gpgpu_fill: Remove libdrm dependency Zbigniew Kempczyński
2020-05-19 8:11 ` [igt-dev] [PATCH i-g-t v4 8/8] HAX: run gpgpu_fill in BAT only Zbigniew Kempczyński
2020-05-19 8:46 ` [igt-dev] ✗ Fi.CI.BAT: failure for Make gpgpu fill tests libdrm independent (rev4) Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20200519081134.24589-6-zbigniew.kempczynski@intel.com \
--to=zbigniew.kempczynski@intel.com \
--cc=chris@chris-wilson.co.uk \
--cc=igt-dev@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox