From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id 5837B10E182 for ; Thu, 22 Dec 2022 09:40:40 +0000 (UTC) From: Jeevan B To: igt-dev@lists.freedesktop.org Date: Thu, 22 Dec 2022 15:06:09 +0530 Message-Id: <20221222093609.7387-1-jeevan.b@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [igt-dev] [PATCH i-g-t v3] lib/igt_draw: Change MOCS settings for MTL List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lucas.demarchi@intel.com Errors-To: igt-dev-bounces@lists.freedesktop.org Sender: "igt-dev" List-ID: On MTL, we want the table entry labelled "UC (GO:Mem)" which has index 5. This means that the MOCS value is 10. v2: Add define for MOCS settings. (Lucas) v3: Extending get_mocs_index and using get_mocs_index to get mocs val. (Zbigniew) Signed-off-by: Jeevan B --- lib/i915/intel_mocs.c | 6 +++++- lib/igt_draw.c | 7 +++++-- 2 files changed, 10 insertions(+), 3 deletions(-) diff --git a/lib/i915/intel_mocs.c b/lib/i915/intel_mocs.c index df541ab0..d2994480 100644 --- a/lib/i915/intel_mocs.c +++ b/lib/i915/intel_mocs.c @@ -11,6 +11,8 @@ #define DG1_MOCS_WB_IDX 5 #define DG2_MOCS_UC_IDX 1 #define DG2_MOCS_WB_IDX 3 +#define MTL_MOCS_UC_IDX 5 +#define MTL_MOCS_WB_IDX 10 #define GEN12_MOCS_UC_IDX 3 #define GEN12_MOCS_WB_IDX 2 #define XY_BLOCK_COPY_BLT_MOCS_SHIFT 21 @@ -38,7 +40,9 @@ static void get_mocs_index(int fd, struct drm_i915_mocs_index *mocs) } else if (IS_DG2(devid)) { mocs->uc_index = DG2_MOCS_UC_IDX; mocs->wb_index = DG2_MOCS_WB_IDX; - + } else if (IS_METEORLAKE(devid)) { + mocs->uc_index = MTL_MOCS_UC_IDX; + mocs->wb_index = MTL_MOCS_WB_IDX; } else if (IS_GEN12(devid)) { mocs->uc_index = GEN12_MOCS_UC_IDX; mocs->wb_index = GEN12_MOCS_WB_IDX; diff --git a/lib/igt_draw.c b/lib/igt_draw.c index 975d65cd..a2c79944 100644 --- a/lib/igt_draw.c +++ b/lib/igt_draw.c @@ -36,6 +36,7 @@ #include "i830_reg.h" #include "i915/gem_create.h" #include "i915/gem_mman.h" +#include "i915/intel_mocs.h" #ifndef PAGE_ALIGN #ifndef PAGE_SIZE @@ -651,6 +652,9 @@ static struct intel_buf *create_buf(int fd, struct buf_ops *bops, return buf; } +#define DG2_MOCS_UC_GO_MEM 2 /* MOCS index 0x1 */ +#define MTL_MOCS_UC_GO_MEM 10 /* MOCS index 0x5 */ + static void draw_rect_blt(int fd, struct cmd_data *cmd_data, struct buf_data *buf, struct rect *rect, uint32_t tiling, uint32_t color) @@ -702,8 +706,7 @@ static void draw_rect_blt(int fd, struct cmd_data *cmd_data, pitch = tiling ? buf->stride / 4 : buf->stride; intel_bb_out(ibb, XY_FAST_COLOR_BLT | blt_cmd_depth); - /* DG2 MOCS entry 2 is "UC - Non-Coherent; GO:Memory" */ - intel_bb_out(ibb, blt_cmd_tiling | 2 << 21 | (pitch-1)); + intel_bb_out(ibb, blt_cmd_tiling | intel_get_wb_mocs(fd) << 21 | (pitch-1)); intel_bb_out(ibb, (rect->y << 16) | rect->x); intel_bb_out(ibb, ((rect->y + rect->h) << 16) | (rect->x + rect->w)); intel_bb_emit_reloc_fenced(ibb, dst->handle, 0, -- 2.36.0