Re: [igt-dev] [PATCH i-g-t 04/10] tools/intel_watermark: Read LP usage from FPGA_DBG on ivb

Govindapillai, Vinod
2023-02-06T11:43:47Z

On Wed, 2023-01-25 at 06:55 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> On ivb FPGA_DBG contains the similar LP level sticky bits that
> are present in WM_DBG on hsw+. Let's dump these out.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---

Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>

>  tools/intel_watermark.c | 16 ++++++++++++++++
>  1 file changed, 16 insertions(+)
>
> diff --git a/tools/intel_watermark.c b/tools/intel_watermark.c
> index 863261e823a5..eac40e4a5d17 100644
> --- a/tools/intel_watermark.c
> +++ b/tools/intel_watermark.c
> @@ -763,6 +763,22 @@ static void ilk_wm_dump(void)
>                 printf("\n");
>                 /* clear the sticky bits */
>                 write_reg(0x45280, wm_dbg);
> +       } else if (IS_IVYBRIDGE(devid)) {
> +               uint32_t fpga_dbg;
> +
> +               fpga_dbg = read_reg(0x42300);
> +               printf("FPGA_DBG: 0x%08x\n", fpga_dbg);
> +               printf(" LP used:");
> +               if (fpga_dbg & (1 << 18))
> +                       printf(" LP0.5");
> +               for (i = 1; i < 4; i++) {
> +                       if (fpga_dbg & (1 << (18+i)))
> +                               printf(" LP%d", i);
> +               }
> +               printf("\n");
> +               /* clear the sticky LP bits */
> +               fpga_dbg &= 1 << 21 | 1 << 20 | 1 << 19 | 1 << 18;
> +               write_reg(0x42300, fpga_dbg);
>         }
>
>         intel_register_access_fini(&mmio_data);