From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTPS id C59F110E3F9 for ; Sun, 12 Mar 2023 19:07:15 +0000 (UTC) From: Vikas Srivastava To: igt-dev@lists.freedesktop.org Date: Mon, 13 Mar 2023 00:34:16 +0530 Message-Id: <20230312190416.1056981-4-vikas.srivastava@intel.com> In-Reply-To: <20230312190416.1056981-1-vikas.srivastava@intel.com> References: <20230312190416.1056981-1-vikas.srivastava@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [igt-dev] [PATCH i-g-t 4/4] tests/i915/gem_linear_blits: Enable XY_FAST_COPY_BLT copy instruction List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: igt-dev-bounces@lists.freedesktop.org Sender: "igt-dev" List-ID: From: Arjun Melkaveri Use XY_FAST_COPY_BLT on newer GPU generations. Signed-off-by: Arjun Melkaveri Co-developed-by: Nirmoy Das Signed-off-by: Vikas Srivastava --- tests/i915/gem_linear_blits.c | 63 ++++++++++++++++++++++------------- 1 file changed, 40 insertions(+), 23 deletions(-) diff --git a/tests/i915/gem_linear_blits.c b/tests/i915/gem_linear_blits.c index fac25095f5..fa5b6a15c3 100644 --- a/tests/i915/gem_linear_blits.c +++ b/tests/i915/gem_linear_blits.c @@ -67,6 +67,7 @@ static void copy(int fd, uint64_t ahnd, uint32_t dst, uint32_t src, struct drm_i915_gem_relocation_entry reloc[2]; struct drm_i915_gem_exec_object2 obj[3]; struct drm_i915_gem_execbuffer2 exec; + static uint32_t devid; int i = 0; memset(obj, 0, sizeof(obj)); @@ -83,29 +84,45 @@ static void copy(int fd, uint64_t ahnd, uint32_t dst, uint32_t src, obj[2].offset = CANONICAL(obj[2].offset); obj[2].flags = EXEC_OBJECT_SUPPORTS_48B_ADDRESS; - batch[i++] = XY_SRC_COPY_BLT_CMD | - XY_SRC_COPY_BLT_WRITE_ALPHA | - XY_SRC_COPY_BLT_WRITE_RGB; - if (intel_gen(intel_get_drm_devid(fd)) >= 8) - batch[i - 1] |= 8; - else - batch[i - 1] |= 6; - - batch[i++] = (3 << 24) | /* 32 bits */ - (0xcc << 16) | /* copy ROP */ - WIDTH*4; - batch[i++] = 0; /* dst x1,y1 */ - batch[i++] = (HEIGHT << 16) | WIDTH; /* dst x2,y2 */ - batch[i++] = obj[0].offset; - if (intel_gen(intel_get_drm_devid(fd)) >= 8) - batch[i++] = obj[0].offset >> 32; - batch[i++] = 0; /* src x1,y1 */ - batch[i++] = WIDTH*4; - batch[i++] = obj[1].offset; - if (intel_gen(intel_get_drm_devid(fd)) >= 8) - batch[i++] = obj[1].offset >> 32; - batch[i++] = MI_BATCH_BUFFER_END; - batch[i++] = MI_NOOP; + devid = intel_get_drm_devid(fd); + + if (intel_graphics_ver(devid) >= IP_VER(12, 60)) { + batch[i++] = XY_FAST_COPY_BLT; + batch[i++] = XY_FAST_COPY_COLOR_DEPTH_32 | WIDTH*4; + batch[i++] = 0; /* dst x1,y1 */ + batch[i++] = (HEIGHT << 16) | WIDTH; /* dst x2,y2 */ + batch[i++] = lower_32_bits(obj[0].offset); /* dst address lower bits */ + batch[i++] = upper_32_bits(CANONICAL(obj[0].offset)); /* dst address upper bits */ + batch[i++] = 0; /* src x1,y1 */ + batch[i++] = WIDTH*4; /* src pitch */ + batch[i++] = lower_32_bits(obj[1].offset); /* src address lower bits */ + batch[i++] = upper_32_bits(CANONICAL(obj[1].offset)); /* src address upper bits */ + batch[i++] = MI_BATCH_BUFFER_END; + batch[i++] = MI_NOOP; + } else { + batch[i++] = XY_SRC_COPY_BLT_CMD | + XY_SRC_COPY_BLT_WRITE_ALPHA | + XY_SRC_COPY_BLT_WRITE_RGB; + if (intel_gen(intel_get_drm_devid(fd)) >= 8) + batch[i - 1] |= 8; + else + batch[i - 1] |= 6; + + batch[i++] = (3 << 24) | /* 32 bits */ + (0xcc << 16) | /* copy ROP */ + WIDTH*4; + batch[i++] = 0; /* dst x1,y1 */ + batch[i++] = (HEIGHT << 16) | WIDTH; /* dst x2,y2 */ + if (intel_gen(devid) >= 8) + batch[i++] = upper_32_bits(CANONICAL(obj[0].offset)); + batch[i++] = 0; /* src x1,y1 */ + batch[i++] = WIDTH*4; + batch[i++] = lower_32_bits(obj[1].offset); + if (intel_gen(devid) >= 8) + batch[i++] = upper_32_bits(CANONICAL(obj[1].offset)); + batch[i++] = MI_BATCH_BUFFER_END; + batch[i++] = MI_NOOP; + } gem_write(fd, obj[2].handle, 0, batch, i * sizeof(batch[0])); -- 2.25.1