From: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
To: igt-dev@lists.freedesktop.org,
Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>,
Ashutosh Dixit <ashutosh.dixit@intel.com>
Subject: [igt-dev] [PATCH i-g-t 09/15] intel_gpu_top: Switch pmu_counter to use aggregated values
Date: Fri, 12 May 2023 19:22:28 -0700 [thread overview]
Message-ID: <20230513022234.2832233-10-umesh.nerlige.ramappa@intel.com> (raw)
In-Reply-To: <20230513022234.2832233-1-umesh.nerlige.ramappa@intel.com>
Aggregate gt specific values for freq and rc6 counters.
Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
tools/intel_gpu_top.c | 49 +++++++++++++++++++++++++++++++++----------
1 file changed, 38 insertions(+), 11 deletions(-)
diff --git a/tools/intel_gpu_top.c b/tools/intel_gpu_top.c
index b0c177329..d995c39b9 100644
--- a/tools/intel_gpu_top.c
+++ b/tools/intel_gpu_top.c
@@ -554,6 +554,26 @@ static int get_num_gts(uint64_t type)
return cnt;
}
+static void init_aggregate_counters(struct engines *engines)
+{
+ struct pmu_counter *pmu;
+
+ pmu = &engines->freq_req;
+ pmu->type = igt_perf_type_id(engines->device);
+ pmu->config = I915_PMU_REQUESTED_FREQUENCY;
+ pmu->present = true;
+
+ pmu = &engines->freq_act;
+ pmu->type = igt_perf_type_id(engines->device);
+ pmu->config = I915_PMU_ACTUAL_FREQUENCY;
+ pmu->present = true;
+
+ pmu = &engines->rc6;
+ pmu->type = igt_perf_type_id(engines->device);
+ pmu->config = I915_PMU_RC6_RESIDENCY;
+ pmu->present = true;
+}
+
static int pmu_init(struct engines *engines)
{
unsigned int i;
@@ -569,14 +589,7 @@ static int pmu_init(struct engines *engines)
if (fd < 0)
return -1;
- engines->freq_req.config = I915_PMU_REQUESTED_FREQUENCY;
- _open_pmu(type, engines->num_counters, &engines->freq_req, engines->fd);
-
- engines->freq_act.config = I915_PMU_ACTUAL_FREQUENCY;
- _open_pmu(type, engines->num_counters, &engines->freq_act, engines->fd);
-
- engines->rc6.config = I915_PMU_RC6_RESIDENCY;
- _open_pmu(type, engines->num_counters, &engines->rc6, engines->fd);
+ init_aggregate_counters(engines);
for (i = 0; i < engines->num_gts; i++) {
engines->freq_req_gt[i].config = __I915_PMU_REQUESTED_FREQUENCY(i);
@@ -692,14 +705,28 @@ static void pmu_sample(struct engines *engines)
for (i = 0; i < engines->num_gts; i++) {
update_sample(&engines->freq_req_gt[i], val);
+ engines->freq_req.val.cur += engines->freq_req_gt[i].val.cur;
+ engines->freq_req.val.prev += engines->freq_req_gt[i].val.prev;
+
update_sample(&engines->freq_act_gt[i], val);
+ engines->freq_act.val.cur += engines->freq_act_gt[i].val.cur;
+ engines->freq_act.val.prev += engines->freq_act_gt[i].val.prev;
+
update_sample(&engines->rc6_gt[i], val);
+ engines->rc6.val.cur += engines->rc6_gt[i].val.cur;
+ engines->rc6.val.prev += engines->rc6_gt[i].val.prev;
}
- update_sample(&engines->freq_req, val);
- update_sample(&engines->freq_act, val);
+ engines->freq_req.val.cur /= engines->num_gts;
+ engines->freq_req.val.prev /= engines->num_gts;
+
+ engines->freq_act.val.cur /= engines->num_gts;
+ engines->freq_act.val.prev /= engines->num_gts;
+
+ engines->rc6.val.cur /= engines->num_gts;
+ engines->rc6.val.prev /= engines->num_gts;
+
update_sample(&engines->irq, val);
- update_sample(&engines->rc6, val);
for (i = 0; i < engines->num_engines; i++) {
struct engine *engine = engine_ptr(engines, i);
--
2.36.1
next prev parent reply other threads:[~2023-05-13 2:22 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-13 2:22 [igt-dev] [PATCH i-g-t 00/15] PMU: multi-tile support Umesh Nerlige Ramappa
2023-05-13 2:22 ` [igt-dev] [PATCH i-g-t 01/15] perf_pmu: Support multi-tile in rc6 subtest Umesh Nerlige Ramappa
2023-05-13 2:45 ` Dixit, Ashutosh
2023-05-13 2:22 ` [igt-dev] [PATCH i-g-t 02/15] perf_pmu: Two new rc6 subtests Umesh Nerlige Ramappa
2023-05-13 2:22 ` [igt-dev] [PATCH i-g-t 03/15] perf_pmu: Support multi-tile in frequency subtest Umesh Nerlige Ramappa
2023-05-13 2:52 ` Dixit, Ashutosh
2023-05-13 2:22 ` [igt-dev] [PATCH i-g-t 04/15] perf_pmu: Quiesce GPU if measuring idle busyness without spinner Umesh Nerlige Ramappa
2023-05-13 2:22 ` [igt-dev] [PATCH i-g-t 05/15] perf_pmu: Use correct pmu config for multi-tile Umesh Nerlige Ramappa
2023-05-13 2:22 ` [igt-dev] [PATCH i-g-t 06/15] intel_gpu_top: Add an array of freq and rc6 counters Umesh Nerlige Ramappa
2023-05-13 2:22 ` [igt-dev] [PATCH i-g-t 07/15] intel_gpu_top: Determine number of tiles Umesh Nerlige Ramappa
2023-05-13 2:22 ` [igt-dev] [PATCH i-g-t 08/15] intel_gpu_top: Capture freq and rc6 counters from each gt Umesh Nerlige Ramappa
2023-05-13 2:22 ` Umesh Nerlige Ramappa [this message]
2023-05-13 2:22 ` [igt-dev] [PATCH i-g-t 10/15] intel_gpu_top: Add definitions for gt-specific items and groups Umesh Nerlige Ramappa
2023-05-13 2:22 ` [igt-dev] [PATCH i-g-t 11/15] intel_gpu_top: Bump up size of groups to accomodate multi-gt Umesh Nerlige Ramappa
2023-05-13 2:22 ` [igt-dev] [PATCH i-g-t 12/15] intel_gpu_top: Increase visibility for class_view Umesh Nerlige Ramappa
2023-05-13 2:22 ` [igt-dev] [PATCH i-g-t 13/15] intel_gpu_top: Show gt specific values if requested Umesh Nerlige Ramappa
2023-05-13 2:22 ` [igt-dev] [PATCH i-g-t 14/15] intel_gpu_top: Reduce one level of indent Umesh Nerlige Ramappa
2023-05-13 2:22 ` [igt-dev] [PATCH i-g-t 15/15] intel_gpu_top: Add gt specific values to header in interactive mode Umesh Nerlige Ramappa
2023-05-13 3:02 ` [igt-dev] ✗ Fi.CI.BAT: failure for PMU: multi-tile support (rev2) Patchwork
2023-05-17 21:05 ` [igt-dev] ✗ Fi.CI.BUILD: failure for PMU: multi-tile support (rev3) Patchwork
-- strict thread matches above, loose matches on Subject: below --
2023-05-06 0:55 [igt-dev] [PATCH i-g-t 00/15] PMU: multi-tile support Umesh Nerlige Ramappa
2023-05-06 0:55 ` [igt-dev] [PATCH i-g-t 09/15] intel_gpu_top: Switch pmu_counter to use aggregated values Umesh Nerlige Ramappa
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