From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: From: Tvrtko Ursulin To: igt-dev@lists.freedesktop.org, Intel-gfx@lists.freedesktop.org Date: Tue, 23 May 2023 16:24:07 +0100 Message-Id: <20230523152407.828236-1-tvrtko.ursulin@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [igt-dev] [PATCH i-g-t] intel_gpu_top: Fix frequency and rc6 counters List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Tvrtko Ursulin Errors-To: igt-dev-bounces@lists.freedesktop.org Sender: "igt-dev" List-ID: From: Tvrtko Ursulin Need to reset aggregated counters before adding to them otherwise numbers will grow endlessly. Signed-off-by: Tvrtko Ursulin Fixes: 3dadeff69d4a ("intel_gpu_top: Switch pmu_counter to use aggregated values") Cc: Umesh Nerlige Ramappa Cc: Ashutosh Dixit --- tools/intel_gpu_top.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/tools/intel_gpu_top.c b/tools/intel_gpu_top.c index 4e49367a70c7..a89f13d46f11 100644 --- a/tools/intel_gpu_top.c +++ b/tools/intel_gpu_top.c @@ -710,6 +710,10 @@ static void pmu_sample(struct engines *engines) engines->ts.prev = engines->ts.cur; engines->ts.cur = pmu_read_multi(engines->fd, num_val, val); + engines->freq_req.val.cur = engines->freq_req.val.prev = 0; + engines->freq_act.val.cur = engines->freq_act.val.prev = 0; + engines->rc6.val.cur = engines->rc6.val.prev = 0; + for (i = 0; i < engines->num_gts; i++) { update_sample(&engines->freq_req_gt[i], val); engines->freq_req.val.cur += engines->freq_req_gt[i].val.cur; -- 2.39.2