From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: From: Rodrigo Vivi To: , Date: Tue, 19 Sep 2023 10:19:53 -0400 Message-ID: <20230919142000.91363-11-rodrigo.vivi@intel.com> In-Reply-To: <20230919142000.91363-1-rodrigo.vivi@intel.com> References: <20230919142000.91363-1-rodrigo.vivi@intel.com> Content-Transfer-Encoding: 8bit Content-Type: text/plain MIME-Version: 1.0 Subject: [igt-dev] [PATCH i-g-t 10/16] drm-uapi/xe: Replace useless 'instance' per unique gt_id List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Rodrigo Vivi Errors-To: igt-dev-bounces@lists.freedesktop.org Sender: "igt-dev" List-ID: Align with commit ("drm/xe/uapi: Replace useless 'instance' per unique gt_id") Signed-off-by: Rodrigo Vivi Signed-off-by: Francois Dugast --- include/drm-uapi/xe_drm.h | 65 ++++++++++++++++++++++++++------------- tests/intel/xe_query.c | 2 +- 2 files changed, 44 insertions(+), 23 deletions(-) diff --git a/include/drm-uapi/xe_drm.h b/include/drm-uapi/xe_drm.h index 336b77074..544f2f14b 100644 --- a/include/drm-uapi/xe_drm.h +++ b/include/drm-uapi/xe_drm.h @@ -336,6 +336,47 @@ struct drm_xe_query_config { __u64 info[]; }; +/** + * struct drm_xe_query_gt - describe an individual GT. + * + * To be used with drm_xe_query_gts, which will return a list with all the + * existing GT individual descriptions. + * Graphics Technology (GT) is a subset of a GPU/tile that is responsible for + * implementing graphics and/or media operations. + */ +struct drm_xe_query_gt { +#define XE_QUERY_GT_TYPE_MAIN 0 +#define XE_QUERY_GT_TYPE_REMOTE 1 +#define XE_QUERY_GT_TYPE_MEDIA 2 + /** @type: GT type: Main, Remote, or Media */ + __u16 type; + /** @gt_id: Unique ID of this GT within the PCI Device */ + __u16 gt_id; + /** @clock_freq: A clock frequency for timestamp */ + __u32 clock_freq; + /** @features: Reserved for future information about GT features */ + __u64 features; + /** + * @native_mem_regions: Bit mask of instances from + * drm_xe_query_mem_usage that lives on the same GPU/Tile and have + * direct access. + */ + __u64 native_mem_regions; + /** + * @slow_mem_regions: Bit mask of instances from + * drm_xe_query_mem_usage that this GT can indirectly access, although + * they live on a different GPU/Tile. + */ + __u64 slow_mem_regions; + /** + * @inaccessible_mem_regions: Bit mask of instances from + * drm_xe_query_mem_usage that is not accessible by this GT at all. + */ + __u64 inaccessible_mem_regions; + /** @reserved: Reserved */ + __u64 reserved[8]; +}; + /** * struct drm_xe_query_gts - describe GTs * @@ -346,30 +387,10 @@ struct drm_xe_query_config { struct drm_xe_query_gts { /** @num_gt: number of GTs returned in gts */ __u32 num_gt; - /** @pad: MBZ */ __u32 pad; - - /** - * @gts: The GTs returned for this device - * - * TODO: convert drm_xe_query_gt to proper kernel-doc. - * TODO: Perhaps info about every mem region relative to this GT? e.g. - * bandwidth between this GT and remote region? - */ - struct drm_xe_query_gt { -#define XE_QUERY_GT_TYPE_MAIN 0 -#define XE_QUERY_GT_TYPE_REMOTE 1 -#define XE_QUERY_GT_TYPE_MEDIA 2 - __u16 type; - __u16 instance; - __u32 clock_freq; - __u64 features; - __u64 native_mem_regions; /* bit mask of instances from drm_xe_query_mem_usage */ - __u64 slow_mem_regions; /* bit mask of instances from drm_xe_query_mem_usage */ - __u64 inaccessible_mem_regions; /* bit mask of instances from drm_xe_query_mem_usage */ - __u64 reserved[8]; - } gts[]; + /** @gts: The GT list returned for this device */ + struct drm_xe_query_gt gts[]; }; /** diff --git a/tests/intel/xe_query.c b/tests/intel/xe_query.c index acf069f46..eb8d52897 100644 --- a/tests/intel/xe_query.c +++ b/tests/intel/xe_query.c @@ -279,7 +279,7 @@ test_query_gts(int fd) for (i = 0; i < gts->num_gt; i++) { igt_info("type: %d\n", gts->gts[i].type); - igt_info("instance: %d\n", gts->gts[i].instance); + igt_info("gt_id: %d\n", gts->gts[i].gt_id); igt_info("clock_freq: %u\n", gts->gts[i].clock_freq); igt_info("features: 0x%016llx\n", gts->gts[i].features); igt_info("native_mem_regions: 0x%016llx\n", -- 2.41.0