From: Matthew Auld <matthew.auld@intel.com>
To: igt-dev@lists.freedesktop.org
Cc: intel-xe@lists.freedesktop.org
Subject: [igt-dev] [PATCH i-g-t 04/12] lib/xe: support cpu_caching and coh_mod for gem_create
Date: Thu, 5 Oct 2023 16:31:08 +0100 [thread overview]
Message-ID: <20231005153116.452319-5-matthew.auld@intel.com> (raw)
In-Reply-To: <20231005153116.452319-1-matthew.auld@intel.com>
Most tests shouldn't about such things, so likely it's just a case of
picking the most sane default. However we also add some helpers for the
tests that do care.
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Pallavi Mishra <pallavi.mishra@intel.com>
---
lib/xe/xe_ioctl.c | 65 ++++++++++++++++++++++++++++++++++-------
lib/xe/xe_ioctl.h | 8 +++++
tests/intel/xe_create.c | 3 ++
3 files changed, 65 insertions(+), 11 deletions(-)
diff --git a/lib/xe/xe_ioctl.c b/lib/xe/xe_ioctl.c
index 730dcfd16..80696aa59 100644
--- a/lib/xe/xe_ioctl.c
+++ b/lib/xe/xe_ioctl.c
@@ -233,13 +233,30 @@ void xe_vm_destroy(int fd, uint32_t vm)
igt_assert_eq(igt_ioctl(fd, DRM_IOCTL_XE_VM_DESTROY, &destroy), 0);
}
-uint32_t __xe_bo_create_flags(int fd, uint32_t vm, uint64_t size, uint32_t flags,
- uint32_t *handle)
+void __xe_default_coh_caching_from_flags(int fd, uint32_t flags,
+ uint16_t *cpu_caching,
+ uint16_t *coh_mode)
+{
+ if ((flags & all_memory_regions(fd)) != system_memory(fd) ||
+ flags & XE_GEM_CREATE_FLAG_SCANOUT) {
+ /* VRAM placements or scanout should always use WC */
+ *cpu_caching = DRM_XE_GEM_CPU_CACHING_WC;
+ *coh_mode = DRM_XE_GEM_COH_NONE;
+ } else {
+ *cpu_caching = DRM_XE_GEM_CPU_CACHING_WB;
+ *coh_mode = DRM_XE_GEM_COH_AT_LEAST_1WAY;
+ }
+}
+
+static uint32_t ___xe_bo_create_flags(int fd, uint32_t vm, uint64_t size, uint32_t flags,
+ uint16_t cpu_caching, uint16_t coh_mode, uint32_t *handle)
{
struct drm_xe_gem_create create = {
.vm_id = vm,
.size = size,
.flags = flags,
+ .cpu_caching = cpu_caching,
+ .coh_mode = coh_mode,
};
int err;
@@ -249,6 +266,18 @@ uint32_t __xe_bo_create_flags(int fd, uint32_t vm, uint64_t size, uint32_t flags
*handle = create.handle;
return 0;
+
+}
+
+uint32_t __xe_bo_create_flags(int fd, uint32_t vm, uint64_t size, uint32_t flags,
+ uint32_t *handle)
+{
+ uint16_t cpu_caching, coh_mode;
+
+ __xe_default_coh_caching_from_flags(fd, flags, &cpu_caching, &coh_mode);
+
+ return ___xe_bo_create_flags(fd, vm, size, flags, cpu_caching, coh_mode,
+ handle);
}
uint32_t xe_bo_create_flags(int fd, uint32_t vm, uint64_t size, uint32_t flags)
@@ -260,19 +289,33 @@ uint32_t xe_bo_create_flags(int fd, uint32_t vm, uint64_t size, uint32_t flags)
return handle;
}
+uint32_t __xe_bo_create_caching(int fd, uint32_t vm, uint64_t size, uint32_t flags,
+ uint16_t cpu_caching, uint16_t coh_mode,
+ uint32_t *handle)
+{
+ return ___xe_bo_create_flags(fd, vm, size, flags, cpu_caching, coh_mode,
+ handle);
+}
+
+uint32_t xe_bo_create_caching(int fd, uint32_t vm, uint64_t size, uint32_t flags,
+ uint16_t cpu_caching, uint16_t coh_mode)
+{
+ uint32_t handle;
+
+ igt_assert_eq(__xe_bo_create_caching(fd, vm, size, flags,
+ cpu_caching, coh_mode, &handle), 0);
+
+ return handle;
+}
+
uint32_t xe_bo_create(int fd, int gt, uint32_t vm, uint64_t size)
{
- struct drm_xe_gem_create create = {
- .vm_id = vm,
- .size = size,
- .flags = vram_if_possible(fd, gt),
- };
- int err;
+ uint32_t handle;
- err = igt_ioctl(fd, DRM_IOCTL_XE_GEM_CREATE, &create);
- igt_assert_eq(err, 0);
+ igt_assert_eq(__xe_bo_create_flags(fd, vm, size, vram_if_possible(fd, gt),
+ &handle), 0);
- return create.handle;
+ return handle;
}
uint32_t xe_bind_exec_queue_create(int fd, uint32_t vm, uint64_t ext)
diff --git a/lib/xe/xe_ioctl.h b/lib/xe/xe_ioctl.h
index 6c281b3bf..c18fc878c 100644
--- a/lib/xe/xe_ioctl.h
+++ b/lib/xe/xe_ioctl.h
@@ -67,6 +67,14 @@ void xe_vm_destroy(int fd, uint32_t vm);
uint32_t __xe_bo_create_flags(int fd, uint32_t vm, uint64_t size, uint32_t flags,
uint32_t *handle);
uint32_t xe_bo_create_flags(int fd, uint32_t vm, uint64_t size, uint32_t flags);
+uint32_t __xe_bo_create_caching(int fd, uint32_t vm, uint64_t size, uint32_t flags,
+ uint16_t cpu_caching, uint16_t coh_mode,
+ uint32_t *handle);
+uint32_t xe_bo_create_caching(int fd, uint32_t vm, uint64_t size, uint32_t flags,
+ uint16_t cpu_caching, uint16_t coh_mode);
+void __xe_default_coh_caching_from_flags(int fd, uint32_t flags,
+ uint16_t *cpu_caching,
+ uint16_t *coh_mode);
uint32_t xe_bo_create(int fd, int gt, uint32_t vm, uint64_t size);
uint32_t xe_exec_queue_create(int fd, uint32_t vm,
struct drm_xe_engine_class_instance *instance,
diff --git a/tests/intel/xe_create.c b/tests/intel/xe_create.c
index 8d845e5c8..f5d2cc1b2 100644
--- a/tests/intel/xe_create.c
+++ b/tests/intel/xe_create.c
@@ -30,6 +30,9 @@ static int __create_bo(int fd, uint32_t vm, uint64_t size, uint32_t flags,
igt_assert(handlep);
+ __xe_default_coh_caching_from_flags(fd, flags, &create.cpu_caching,
+ &create.coh_mode);
+
if (igt_ioctl(fd, DRM_IOCTL_XE_GEM_CREATE, &create)) {
ret = -errno;
errno = 0;
--
2.41.0
next prev parent reply other threads:[~2023-10-05 15:31 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-05 15:31 [igt-dev] [PATCH i-g-t 00/12] PAT and cache coherency support Matthew Auld
2023-10-05 15:31 ` [igt-dev] [PATCH i-g-t 01/12] drm-uapi/xe_drm: sync to get pat and coherency bits Matthew Auld
2023-10-09 22:03 ` Mishra, Pallavi
2023-10-05 15:31 ` [igt-dev] [PATCH i-g-t 02/12] lib/igt_fb: mark buffers as SCANOUT Matthew Auld
2023-10-09 22:03 ` Mishra, Pallavi
2023-10-05 15:31 ` [igt-dev] [PATCH i-g-t 03/12] lib/igt_draw: " Matthew Auld
2023-10-09 22:03 ` Mishra, Pallavi
2023-10-05 15:31 ` Matthew Auld [this message]
2023-10-09 22:04 ` [igt-dev] [PATCH i-g-t 04/12] lib/xe: support cpu_caching and coh_mod for gem_create Mishra, Pallavi
2023-10-05 15:31 ` [igt-dev] [PATCH i-g-t 05/12] tests/xe/mmap: add some tests for cpu_caching and coh_mode Matthew Auld
2023-10-05 15:31 ` [igt-dev] [PATCH i-g-t 06/12] lib/intel_pat: add helpers for common pat_index modes Matthew Auld
2023-10-05 15:31 ` [igt-dev] [PATCH i-g-t 07/12] lib/allocator: add get_offset_pat_index() helper Matthew Auld
2023-10-06 11:38 ` [igt-dev] [Intel-xe] " Zbigniew Kempczyński
2023-10-05 15:31 ` [igt-dev] [PATCH i-g-t 08/12] lib/intel_blt: support pat_index Matthew Auld
2023-10-06 11:51 ` Zbigniew Kempczyński
2023-10-06 12:08 ` Matthew Auld
2023-10-09 9:21 ` Zbigniew Kempczyński
2023-10-05 15:31 ` [igt-dev] [PATCH i-g-t 09/12] lib/intel_buf: " Matthew Auld
2023-10-06 12:13 ` [igt-dev] [Intel-xe] " Zbigniew Kempczyński
2023-10-05 15:31 ` [igt-dev] [PATCH i-g-t 10/12] lib/xe_ioctl: update vm_bind to account for pat_index Matthew Auld
2023-10-05 15:31 ` [igt-dev] [PATCH i-g-t 11/12] tests/xe: add some vm_bind pat_index tests Matthew Auld
2023-10-05 15:31 ` [igt-dev] [PATCH i-g-t 12/12] tests/intel-ci/xe: add pat and caching related tests Matthew Auld
2023-10-05 20:12 ` [igt-dev] ✓ Fi.CI.BAT: success for PAT and cache coherency support Patchwork
2023-10-05 21:29 ` [igt-dev] ✗ CI.xeBAT: failure " Patchwork
2023-10-06 10:38 ` [igt-dev] ✓ Fi.CI.IGT: success " Patchwork
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