From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from NAM12-MW2-obe.outbound.protection.outlook.com (mail-mw2nam12on2064.outbound.protection.outlook.com [40.107.244.64]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0A7FE10E181 for ; Mon, 16 Oct 2023 20:58:16 +0000 (UTC) From: Hersen Wu To: , , , , , , , Date: Mon, 16 Oct 2023 16:58:05 -0400 Message-ID: <20231016205805.86100-2-hersenxs.wu@amd.com> In-Reply-To: <20231016205805.86100-1-hersenxs.wu@amd.com> References: <20231016205805.86100-1-hersenxs.wu@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain Subject: [igt-dev] [PATCH 2/2] [i-g-t] tests/kms_cursor_crc: Fix test intermittent failures on AMD gpu List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Hersen Wu , markyacoub@google.com Errors-To: igt-dev-bounces@lists.freedesktop.org Sender: "igt-dev" List-ID: Wait for two more vblanks before reading crc on AMD gpu. Without waiting for two vblanks, AMD cursor updates may not synchronized to the same frame of pipe, crc generated may not be reliable for both hw_test and sw_test. For sw_test, igt_wait_for_vblank_count within cursor_disable only applies to loop 0 test of test_crc_onscreen, test_crc_sliding, test_crc_random. Add igt_wait_for_vblank_count for sw_test for loop 1 and above tests for AMD gpu to avoid intermittent failures. Signed-off-by: Hersen Wu Reviewed-by: Juha-Pekka Heikkila --- tests/kms_cursor_crc.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/tests/kms_cursor_crc.c b/tests/kms_cursor_crc.c index ba29ff65d..e3259e147 100644 --- a/tests/kms_cursor_crc.c +++ b/tests/kms_cursor_crc.c @@ -276,6 +276,15 @@ static void do_single_test(data_t *data, int x, int y, bool hw_test, restore_image(data, swbufidx, &((cursorarea){x, y, data->curw, data->curh})); igt_plane_set_fb(data->primary, &data->primary_fb[swbufidx]); igt_display_commit(display); + + /* Wait for two more vblanks since cursor updates may not + * synchronized to the same frame on AMD HW + */ + if (is_amdgpu_device(data->drm_fd)) + igt_wait_for_vblank_count(data->drm_fd, + display->pipes[data->pipe].crtc_offset, + data->vblank_wait_count); + igt_pipe_crc_get_current(data->drm_fd, pipe_crc, &crc); igt_assert_crc_equal(&crc, hwcrc); } @@ -1079,7 +1088,11 @@ igt_main_args("e", NULL, help_str, opt_handler, NULL) igt_require_pipe_crc(data.drm_fd); - data.vblank_wait_count = is_msm_device(data.drm_fd) ? 2 : 1; + /* Wait for two more vblanks since cursor updates may not + * synchronized to the same frame on AMD HW + */ + data.vblank_wait_count = + (is_msm_device(data.drm_fd) || is_amdgpu_device(data.drm_fd)) ? 2 : 1; } data.cursor_max_w = cursor_width; -- 2.25.1