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Thu, 18 Jan 2024 07:14:58 -0600 From: Hersen Wu To: , , , , , Subject: [PATCH 3/3] [i-g-t] tests/amdgpu/amd_ilr: Fix psr edp rx crc read timeout Date: Thu, 18 Jan 2024 08:14:54 -0500 Message-ID: <20240118131454.19652-3-hersenxs.wu@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240118131454.19652-1-hersenxs.wu@amd.com> References: <20240118131454.19652-1-hersenxs.wu@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF000252A3:EE_|MW3PR12MB4587:EE_ X-MS-Office365-Filtering-Correlation-Id: 0d36e1e4-d020-4e8f-eb77-08dc18277962 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: K3TOr3kqTRpYW3yKSY3XER0gv9xnX4hnppF1h0ME8NqIToKe4Rs2jjN03v2C2VZ2qD0bHgynhaOkdCC0XW/l1Kyaoo91R02kX6LRLMWhMXLxNfJBnXr6PResysiPDI1vdtkSENt2U8KD5h4k9F3IWltGk+vuETXH7xgu5wu2XfgcHjHp/BueLGAGZIn/VllBxn1g4ewC1CYoFKnUplsPPiO2Ht1I7nrib1JWlmK3BN0zu6SKR9SqKOzOemf1Nf11f4uupOecaNh4eFQo8ma0Yd6Mbf9FMdKk+QCN0ysjQeNEyRCekfzQaC5IuT/FZMviuYZjSD5HpMc2GOLPgJwVQyom9+yJomkaH3t7e3JCjlRQnxd+vs9j2uZ18yCRYfU4NzpPIBU5gb670TYffalllr9jlUTVv0L0xxjpRBQTFdiJ4n3siC9IlWPXTPi3y7j4D6iP1EPeD80+kIKL7pVfNg5000d+dqEVvUQHmbTICz+0gUSFUdv9t4ozkpz7BRu0uvV3G+MYnnxuBhAeJikfnlb+UkPA8q4Bscr00aauJHevp/912Uo9/F14FbuRTGaD9jVzpeJBTkWvus4tqNRiLSj2YuAVWskhL0emPoDdt9FiizlnIGsaz4vIu8JZFRbUFmtUIrOT1TQotFHpdhG/epadOb+csnZxCI4GOGAgzvo9/jvQSc9wyR87ycM1D7I42RQixzJAG/4Sst5EaqkyU4fhyC1Ii/Ii0AogjwRdrfSycSIkxyXH9uAwwySTOGK6neHOdYA8zqrCAQrmIdb7YQ== X-Forefront-Antispam-Report: CIP:165.204.84.17; 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Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF000252A3.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW3PR12MB4587 X-BeenThere: igt-dev@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development mailing list for IGT GPU Tools List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Hersen Wu , markyacoub@google.com Errors-To: igt-dev-bounces@lists.freedesktop.org Sender: "igt-dev" With debugfs disallow_edp_enter_psr, disable edp psr before tx read rx crc. With set_all_output_pipe_to_none of test_init, tx write dpcd 0x600=2. this will let dpcd 0x170=0. rx psr and crc check for rx internal logic are disabled. with disallow_edp_enter_psr, when set test patterns are committed by igt_display_commit_atomic, kernel driver will turn on edp with dpcd 0x170=0. then tx read rx crc successfully. Signed-off-by: Hersen Wu --- tests/amdgpu/amd_ilr.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/tests/amdgpu/amd_ilr.c b/tests/amdgpu/amd_ilr.c index b2c0f294d..8e892738f 100644 --- a/tests/amdgpu/amd_ilr.c +++ b/tests/amdgpu/amd_ilr.c @@ -205,11 +205,31 @@ static void test_flow(data_t *data, enum sub_test option) continue; } + /* igt_amd_output_has_ilr_setting check if debugfs exist, + * but ilr settings could be all 0s -- not supported. + * need check if ilr settings values are supported. + */ + igt_amd_read_ilr_setting(data->drm_fd, output->name, data->supported_ilr); + if (data->supported_ilr[0] == 0) + continue; + igt_info("Testing on output: %s\n", output->name); /* Init only if display supports ilr link settings */ test_init(data, output); + /* with set_all_output_pipe_to_none within test_init, + * kernel driver tx write dpcd 0x600=2 to rx. edp rx + * exit psr state and stop verify crc from main link. + * with disable edp enter psr within kernel, when run + * set test pattern, display is turned on. kernel driver + * tx will not notify rx psr enable and crc checking by + * rx. by this, when tx want to read crc from rx, rx will + * check crc and response right away. timeout will not + * happens. + */ + igt_amd_disallow_edp_enter_psr(data->drm_fd, output->name, true); + mode = igt_output_get_mode(output); igt_assert(mode); @@ -243,6 +263,9 @@ static void test_flow(data_t *data, enum sub_test option) igt_remove_fb(data->drm_fd, &data->fb); test_fini(data); + + /* restore allow kernel driver eDP PSR */ + igt_amd_disallow_edp_enter_psr(data->drm_fd, output->name, false); } } -- 2.25.1