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CTRY:; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB03.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230031)(36860700004)(82310400014)(1800799015)(376005); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Mar 2024 12:08:15.2881 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 89cf679c-a5ab-4c8e-20ff-08dc4cc44029 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN3PEPF0000B373.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW3PR12MB4378 X-BeenThere: igt-dev@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development mailing list for IGT GPU Tools List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: igt-dev-bounces@lists.freedesktop.org Sender: "igt-dev" From: Hersen Wu At end of test, with disallow_edp_enter_psr = 0, run DPMS off, on for eDP. This will trigger DRM kernel driver enable eDP PSR. Signed-off-by: Hersen Wu --- lib/igt_amd.c | 5 --- tests/amdgpu/amd_ilr.c | 69 ++++++++++++++++++++++++++++++++++-------- 2 files changed, 56 insertions(+), 18 deletions(-) diff --git a/lib/igt_amd.c b/lib/igt_amd.c index 623883dbc..d10c3c1f2 100644 --- a/lib/igt_amd.c +++ b/lib/igt_amd.c @@ -1183,11 +1183,6 @@ void igt_amd_disallow_edp_enter_psr(int drm_fd, char *connector_name, bool enabl const char *allow_edp_psr = "1"; const char *dis_allow_edp_psr = "0"; - /* if current psr is not enabled, skip this debugfs */ - if (!igt_amd_psr_support_drv(drm_fd, connector_name, PSR_MODE_1) && - !igt_amd_psr_support_drv(drm_fd, connector_name, PSR_MODE_2)) - return; - fd = igt_debugfs_connector_dir(drm_fd, connector_name, O_RDONLY); igt_assert(fd >= 0); ret = openat(fd, DEBUGFS_DISALLOW_EDP_ENTER_PSR, O_WRONLY); diff --git a/tests/amdgpu/amd_ilr.c b/tests/amdgpu/amd_ilr.c index 46ad6f60a..77e11aaad 100644 --- a/tests/amdgpu/amd_ilr.c +++ b/tests/amdgpu/amd_ilr.c @@ -199,28 +199,32 @@ static void test_flow(data_t *data, enum sub_test option) igt_enable_connectors(data->drm_fd); for_each_connected_output(&data->display, output) { - if (!igt_amd_output_has_ilr_setting(data->drm_fd, output->name) || + if ((output->config.connector->connector_type != DRM_MODE_CONNECTOR_eDP) || + !igt_amd_output_has_ilr_setting(data->drm_fd, output->name) || !igt_amd_output_has_link_settings(data->drm_fd, output->name)) { igt_info("Skipping output: %s\n", output->name); continue; } - /* igt_amd_output_has_ilr_setting only checks if debugfs - * exist. ilr settings could be all 0s -- not supported. - * IGT needs to check if ilr settings values are supported. - */ - igt_amd_read_ilr_setting(data->drm_fd, output->name, data->supported_ilr); - if (data->supported_ilr[0] == 0) - continue; - igt_info("Testing on output: %s\n", output->name); + /* states under /sys/kernel/debug/dri/0/eDP-1: + * psr_capability.driver_support (psr_en): yes + * ilr_setting (ilr): yes/no + * disallow_edp_enter_psr (dis_psr): no + */ + /* Init only if display supports ilr link settings */ test_init(data, output); + /* eDP is powered down within test_init + * psr_en: yes; ilr: no; dis_psr: no + */ + /* Disable eDP PSR to avoid timeout when reading CRC */ igt_amd_disallow_edp_enter_psr(data->drm_fd, output->name, true); + /* psr_en: yes; ilr: no; dis_psr: yes */ mode = igt_output_get_mode(output); igt_assert(mode); @@ -229,8 +233,27 @@ static void test_flow(data_t *data, enum sub_test option) mode->vdisplay, DRM_FORMAT_XRGB8888, 0, &data->fb); igt_plane_set_fb(data->primary, &data->fb); + + /* psr_en: yes; ilr: no; dis_psr: yes + * commit stream. power on eDP + */ igt_display_commit_atomic(&data->display, DRM_MODE_ATOMIC_ALLOW_MODESET, NULL); + /* psr_en: no; ilr: yes; dis_psr: yes. + * With dis_psr yes, drm kernel driver + * disable psr, psr_en is set to no. + */ + + /* igt_amd_output_has_ilr_setting only checks if debugfs + * exist. ilr settings could be all 0s -- not supported. + * IGT needs to check if ilr settings values are supported. + * Supported_ilr is read from DPCD registers. Make sure + * eDP is powered on before reading supported_ilr. + */ + igt_amd_read_ilr_setting(data->drm_fd, output->name, data->supported_ilr); + if (data->supported_ilr[0] == 0) + continue; + /* Collect info of Reported Lane Count & ILR */ igt_amd_read_link_settings(data->drm_fd, output->name, data->lane_count, data->link_rate, data->link_spread_spectrum); @@ -247,18 +270,38 @@ static void test_flow(data_t *data, enum sub_test option) break; } + /* psr_en: no; ilr: yes; dis_psr: yes */ + kmstest_set_connector_dpms(data->drm_fd, + output->config.connector, DRM_MODE_DPMS_OFF); + + /* Power down eDP. + * psr_en: no; ilr: no; dis_psr: yes. + */ + + /* Enable PSR after reading eDP Rx CRC */ + igt_amd_disallow_edp_enter_psr(data->drm_fd, output->name, false); + + /* psr_en: no; ilr: yes: dis_psr: no */ + + /* Power on eDP and setup psr */ + kmstest_set_connector_dpms(data->drm_fd, + output->config.connector, DRM_MODE_DPMS_ON); + + /* psr_en: yes; ilr: yes: dis_psr: no */ + /* Reset preferred link settings*/ memset(data->supported_ilr, 0, sizeof(data->supported_ilr)); igt_amd_write_ilr_setting(data->drm_fd, output->name, 0, 0); + /* psr_en: yes; ilr: yes; dis_psr: no */ + + /* commit 0 stream. power down eDP */ igt_remove_fb(data->drm_fd, &data->fb); - test_fini(data); + /* psr_en: yes; ilr: no; dis_psr: no */ - /* Enable eDP PSR */ - igt_amd_disallow_edp_enter_psr(data->drm_fd, output->name, false); + test_fini(data); } - } igt_main -- 2.25.1