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Mon, 25 Mar 2024 08:19:28 -0500 From: Hersen Wu To: , , , , , , CC: , Hersen Wu Subject: [PATCH] [i-g-t] tests/amdgpu/amd_ilr: Fix eDP PSR not be re-enabled after test Date: Mon, 25 Mar 2024 09:19:26 -0400 Message-ID: <20240325131926.42203-1-hersenxs.wu@amd.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain Received-SPF: None (SATLEXMB03.amd.com: hersenxs.wu@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS2PEPF0000343D:EE_|SA3PR12MB7832:EE_ X-MS-Office365-Filtering-Correlation-Id: fe178d35-7792-44d7-b765-08dc4cce4205 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: lXPBkBC+G8vF2lFtl/F3gLXoz6MFWdxGxPw9h6Dv4Cbp+iFvqpPSUmpsRtV5U7rVN9OR4L8fKViVhB1A72aEIJ+Xppts0iy0I0EF8cmSnx8715f/DM+HidQBRJLunMVJUEUo6ar1UOTKRSd92TdlNTyQJelVhpw3Tpy78zIZhsg7r6Swwy+F2dRzPHElvC/jHsM4LY2zreTt4+adKQpb1osKxNzxfgB7cstqTflySIunpQLxAndqMuPqURBbpLwJbPxtmVEu0O2M6GotjPfO6VvlUTxBqaEaHzGbPwKc02zbS2IIdXiCuXc5Ktb4qNxUNCWzdO5I2d9dl7E+qPAxHgvVMu+CoaD8W2Jj2bz/TUoBu25lU+dy1qC7FOfa1yrdt9qXjP2pavgbSNv6AajpMHCDEKc5/WI9id8mNKnarVJW9IWQ1gIlZAZDqzcksgAgyOZGYo05iGdjKI/m88djNTucptaIEQLlgD97lt6E6vZo8lMsXpIyJSwrCeslQt6dq1B5IydeCOkmCsjhCbIgnDS5Q/OmAWbAK653bEAeHlrMWyMtRsQK2hVw4asHOjopSp8584oSqVMzDM3YWZR32Q+PI9Xn6sASaFxYZohTfIao3I5cM5oX2QnwRMxM3dOU/aHYOgEACN5RIObxUrvM6iEoKzFEbe7h40/HwQtk0IRTB+ulKSa+IqFgDyNMkZjkeZPsKai7MEuNEXsYSKE828LPwu3LDvdr9UkZx5Vx1Um6HqYFbEKiOaBoDEKWLhCG X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB03.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230031)(376005)(82310400014)(36860700004)(1800799015); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Mar 2024 13:19:53.3475 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: fe178d35-7792-44d7-b765-08dc4cce4205 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS2PEPF0000343D.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA3PR12MB7832 X-BeenThere: igt-dev@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development mailing list for IGT GPU Tools List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: igt-dev-bounces@lists.freedesktop.org Sender: "igt-dev" From: Hersen Wu At end of test, with disallow_edp_enter_psr = 0, run DPMS off, on for eDP. This will trigger DRM kernel driver enable eDP PSR. Signed-off-by: Hersen Wu --- lib/igt_amd.c | 5 --- tests/amdgpu/amd_ilr.c | 73 ++++++++++++++++++++++++++++++++++-------- 2 files changed, 60 insertions(+), 18 deletions(-) diff --git a/lib/igt_amd.c b/lib/igt_amd.c index 623883dbc..d10c3c1f2 100644 --- a/lib/igt_amd.c +++ b/lib/igt_amd.c @@ -1183,11 +1183,6 @@ void igt_amd_disallow_edp_enter_psr(int drm_fd, char *connector_name, bool enabl const char *allow_edp_psr = "1"; const char *dis_allow_edp_psr = "0"; - /* if current psr is not enabled, skip this debugfs */ - if (!igt_amd_psr_support_drv(drm_fd, connector_name, PSR_MODE_1) && - !igt_amd_psr_support_drv(drm_fd, connector_name, PSR_MODE_2)) - return; - fd = igt_debugfs_connector_dir(drm_fd, connector_name, O_RDONLY); igt_assert(fd >= 0); ret = openat(fd, DEBUGFS_DISALLOW_EDP_ENTER_PSR, O_WRONLY); diff --git a/tests/amdgpu/amd_ilr.c b/tests/amdgpu/amd_ilr.c index 46ad6f60a..f63a4f782 100644 --- a/tests/amdgpu/amd_ilr.c +++ b/tests/amdgpu/amd_ilr.c @@ -199,28 +199,33 @@ static void test_flow(data_t *data, enum sub_test option) igt_enable_connectors(data->drm_fd); for_each_connected_output(&data->display, output) { - if (!igt_amd_output_has_ilr_setting(data->drm_fd, output->name) || + if ((output->config.connector->connector_type != DRM_MODE_CONNECTOR_eDP) || + !igt_amd_output_has_ilr_setting(data->drm_fd, output->name) || !igt_amd_output_has_link_settings(data->drm_fd, output->name)) { igt_info("Skipping output: %s\n", output->name); continue; } - /* igt_amd_output_has_ilr_setting only checks if debugfs - * exist. ilr settings could be all 0s -- not supported. - * IGT needs to check if ilr settings values are supported. - */ - igt_amd_read_ilr_setting(data->drm_fd, output->name, data->supported_ilr); - if (data->supported_ilr[0] == 0) - continue; - igt_info("Testing on output: %s\n", output->name); + /* states under /sys/kernel/debug/dri/0/eDP-1: + * psr_capability.driver_support (drv_support_psr): yes + * ilr_setting (intermediate link rates capabilities, + * ilr_cap): yes/no + * kernel driver disallow_edp_enter_psr (dis_psr): no + */ + /* Init only if display supports ilr link settings */ test_init(data, output); + /* eDP enter power saving mode within test_init + * drv_support_psr: yes; ilr_cap: no; dis_psr: no + */ + /* Disable eDP PSR to avoid timeout when reading CRC */ igt_amd_disallow_edp_enter_psr(data->drm_fd, output->name, true); + /* drv_support_psr: yes; ilr_cap: no; dis_psr: yes */ mode = igt_output_get_mode(output); igt_assert(mode); @@ -229,8 +234,30 @@ static void test_flow(data_t *data, enum sub_test option) mode->vdisplay, DRM_FORMAT_XRGB8888, 0, &data->fb); igt_plane_set_fb(data->primary, &data->fb); + + /* drv_support_psr: yes; ilr_cap: no; dis_psr: yes + * commit stream. eDP exit power saving mode. + */ igt_display_commit_atomic(&data->display, DRM_MODE_ATOMIC_ALLOW_MODESET, NULL); + /* drv_support_psr: no; ilr_cap: yes; dis_psr: yes. + * With dis_psr yes, drm kernel driver + * disable psr, psr_en is set to no. + */ + + /* igt_amd_output_has_ilr_setting only checks if debugfs + * exist. ilr settings could be all 0s -- not supported. + * IGT needs to check if ilr settings values are supported. + * Supported_ilr is read from DPCD registers. Make sure + * eDP exiting power saving mode before reading supported_ilr. + */ + igt_amd_read_ilr_setting(data->drm_fd, output->name, data->supported_ilr); + if (data->supported_ilr[0] == 0) { + /* Enable PSR after reading eDP Rx CRC */ + igt_amd_disallow_edp_enter_psr(data->drm_fd, output->name, false); + continue; + } + /* Collect info of Reported Lane Count & ILR */ igt_amd_read_link_settings(data->drm_fd, output->name, data->lane_count, data->link_rate, data->link_spread_spectrum); @@ -247,18 +274,38 @@ static void test_flow(data_t *data, enum sub_test option) break; } + /* drv_support_psr: no; ilr_cap: yes; dis_psr: yes */ + kmstest_set_connector_dpms(data->drm_fd, + output->config.connector, DRM_MODE_DPMS_OFF); + + /* eDP enter power saving mode. + * drv_support_psr: no; ilr_cap: no; dis_psr: yes. + */ + + /* Enable PSR after reading eDP Rx CRC */ + igt_amd_disallow_edp_enter_psr(data->drm_fd, output->name, false); + + /* drv_support_psr: no; ilr_cap: yes: dis_psr: no */ + + /* eDP exit power saving mode and setup psr */ + kmstest_set_connector_dpms(data->drm_fd, + output->config.connector, DRM_MODE_DPMS_ON); + + /* drv_support_psr: yes; ilr_cap: yes: dis_psr: no */ + /* Reset preferred link settings*/ memset(data->supported_ilr, 0, sizeof(data->supported_ilr)); igt_amd_write_ilr_setting(data->drm_fd, output->name, 0, 0); + /* drv_support_psr: yes; ilr_cap: yes; dis_psr: no */ + + /* commit 0 stream. eDP enter power saving mode */ igt_remove_fb(data->drm_fd, &data->fb); - test_fini(data); + /* drv_support_psr: yes; ilr_cap: no; dis_psr: no */ - /* Enable eDP PSR */ - igt_amd_disallow_edp_enter_psr(data->drm_fd, output->name, false); + test_fini(data); } - } igt_main -- 2.25.1