[PATCH i-g-t 2/3] tests/intel/kms_psr*: Add psr_sink_error_check to PSR tests

["Jouni Högander" <jouni.hogander@intel.com>]

Currently we are ignoring possible errors detected by the sink in our PSR
testcases. Fix this by add psr_sink_error_check to each of them.

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 tests/intel/kms_frontbuffer_tracking.c | 5 +++--
 tests/intel/kms_pm_dc.c                | 2 ++
 tests/intel/kms_psr.c                  | 2 ++
 tests/intel/kms_psr2_sf.c              | 2 ++
 tests/intel/kms_psr2_su.c              | 2 ++
 tests/intel/kms_psr_stress_test.c      | 1 +
 6 files changed, 12 insertions(+), 2 deletions(-)

diff --git a/tests/intel/kms_frontbuffer_tracking.c b/tests/intel/kms_frontbuffer_tracking.c
index e45d17dd6..913c7b234 100644
--- a/tests/intel/kms_frontbuffer_tracking.c
+++ b/tests/intel/kms_frontbuffer_tracking.c
@@ -2722,10 +2722,11 @@ static void do_status_assertions(int flags)
 						   prim_mode_params.pipe));
 	}
 
-	if (flags & ASSERT_PSR_ENABLED)
+	if (flags & ASSERT_PSR_ENABLED) {
 		igt_assert_f(psr_wait_entry(drm.debugfs, PSR_MODE_1, NULL),
 			     "PSR still disabled\n");
-	else if (flags & ASSERT_PSR_DISABLED)
+		psr_sink_error_check(drm.debugfs, PSR_MODE_1, prim_mode_params.output);
+	} else if (flags & ASSERT_PSR_DISABLED)
 		igt_assert_f(psr_wait_update(drm.debugfs, PSR_MODE_1, NULL),
 			     "PSR still enabled\n");
 }
diff --git a/tests/intel/kms_pm_dc.c b/tests/intel/kms_pm_dc.c
index e1318bfa6..d5753ad32 100644
--- a/tests/intel/kms_pm_dc.c
+++ b/tests/intel/kms_pm_dc.c
@@ -407,6 +407,7 @@ static void test_dc_state_psr(data_t *data, int dc_flag)
 	igt_require(!psr_disabled_check(data->debugfs_fd));
 	igt_assert(psr_wait_entry(data->debugfs_fd, data->op_psr_mode, NULL));
 	check_dc_counter(data, dc_flag, dc_counter_before_psr);
+	psr_sink_error_check(data->debugfs_fd, data->op_psr_mode, data->output);
 	cleanup_dc_psr(data);
 }
 
@@ -675,6 +676,7 @@ static void test_pkgc_state_psr(data_t *data)
 	igt_wait((cur_value = read_pkgc_counter(data->debugfs_root_fd)) > prev_value,
 		  timeout_sec * 1000, 100);
 	igt_assert_f(cur_value > prev_value, "PKGC10 is not achieved.\n");
+	psr_sink_error_check(data->debugfs_fd, data->op_psr_mode, data->output);
 	psr_dpms(data, DRM_MODE_DPMS_ON);
 	cleanup_dc_psr(data);
 }
diff --git a/tests/intel/kms_psr.c b/tests/intel/kms_psr.c
index f3caa9ecc..c59476137 100644
--- a/tests/intel/kms_psr.c
+++ b/tests/intel/kms_psr.c
@@ -650,6 +650,8 @@ static void test_cleanup(data_t *data)
 {
 	igt_plane_t *primary;
 
+	psr_sink_error_check(data->debugfs_fd, data->op_psr_mode, data->output);
+
 	igt_output_override_mode(data->output, NULL);
 
 	primary = igt_output_get_plane_type(data->output,
diff --git a/tests/intel/kms_psr2_sf.c b/tests/intel/kms_psr2_sf.c
index 03ff1cddb..a9be1a1ec 100644
--- a/tests/intel/kms_psr2_sf.c
+++ b/tests/intel/kms_psr2_sf.c
@@ -972,6 +972,8 @@ static void run(data_t *data)
 	default:
 		igt_assert(false);
 	}
+
+	psr_sink_error_check(data->debugfs_fd, data->psr_mode, data->output);
 }
 
 static void cleanup(data_t *data)
diff --git a/tests/intel/kms_psr2_su.c b/tests/intel/kms_psr2_su.c
index 437ee36f6..0099daf1d 100644
--- a/tests/intel/kms_psr2_su.c
+++ b/tests/intel/kms_psr2_su.c
@@ -273,6 +273,8 @@ static void run(data_t *data, igt_output_t *output)
 
 	igt_assert_f(result,
 		     "No matching selective update blocks read from debugfs\n");
+
+	psr_sink_error_check(data->debugfs_fd, PSR_MODE_2, output);
 }
 
 static void cleanup(data_t *data, igt_output_t *output)
diff --git a/tests/intel/kms_psr_stress_test.c b/tests/intel/kms_psr_stress_test.c
index d6e2340b8..73a6eb56d 100644
--- a/tests/intel/kms_psr_stress_test.c
+++ b/tests/intel/kms_psr_stress_test.c
@@ -344,6 +344,7 @@ static void run(data_t *data)
 
 	/* Check if after all this stress the PSR is still in the same state */
 	igt_assert(psr_get_mode(data->debugfs_fd, NULL) == data->initial_state);
+	psr_sink_error_check(data->debugfs_fd, data->initial_state, data->output);
 }
 
 igt_main
-- 
2.34.1