From: "Jesse.zhang@amd.com" <jesse.zhang@amd.com>
To: <igt-dev@lists.freedesktop.org>
Cc: Vitaly Prosyak <vitaly.prosyak@amd.com>,
Alex Deucher <alexander.deucher@amd.com>,
Christian Koenig <christian.koenig@amd.com>,
"Jesse.zhang@amd.com" <jesse.zhang@amd.com>
Subject: [PATCH i-g-t] tests/amd_queue_reset: add sdma test in queue reset
Date: Thu, 29 Aug 2024 15:31:53 +0800 [thread overview]
Message-ID: <20240829073153.188855-1-jesse.zhang@amd.com> (raw)
To enhance queue reset, add sdma ip test.
Cc: Vitaly Prosyak <vitaly.prosyak@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Christian Koenig <christian.koenig@amd.com>
Signed-off-by: Jesse Zhang <jesse.zhang@amd.com>
---
tests/amdgpu/amd_queue_reset.c | 12 ++++++++----
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/tests/amdgpu/amd_queue_reset.c b/tests/amdgpu/amd_queue_reset.c
index 537f653f9..af5a09fd7 100644
--- a/tests/amdgpu/amd_queue_reset.c
+++ b/tests/amdgpu/amd_queue_reset.c
@@ -1035,7 +1035,6 @@ igt_main
posix_spawn_file_actions_t action;
amdgpu_device_handle device;
struct amdgpu_gpu_info gpu_info = {0};
- struct drm_amdgpu_info_hw_ip info[2] = {0};
int fd = -1;
int fd_shm = -1;
struct shmbuf *sh_mem = NULL;
@@ -1047,8 +1046,9 @@ igt_main
unsigned int ring_id_job_good;
unsigned int ring_id_job_bad;
- enum amd_ip_block_type ip_tests[2] = {AMD_IP_COMPUTE/*keep first*/, AMD_IP_GFX};
+ enum amd_ip_block_type ip_tests[] = {AMD_IP_COMPUTE/*keep first*/, AMD_IP_GFX, AMD_IP_DMA};
enum amd_ip_block_type ip_background = AMD_IP_COMPUTE;
+ struct drm_amdgpu_info_hw_ip info[ARRAY_SIZE(ip_tests)] = {0};
amdgpu_context_handle *arr_context_handle = NULL;
@@ -1142,13 +1142,17 @@ igt_main
for (int i = 0; i < ARRAY_SIZE(ip_tests); i++) {
reset_rings_numbers(&ring_id_good, &ring_id_bad, &ring_id_job_good, &ring_id_job_bad);
for (struct dynamic_test *it = &arr_err[0]; it->name; it++) {
+ if(ip_tests[i] == AMD_IP_DMA && !strstr(it->name,"CMD"))
+ continue;
igt_describe("Stressful-and-multiple-cs-of-bad-and-good-length-operations-using-multiple-processes");
- igt_subtest_with_dynamic_f("amdgpu-%s-%s", ip_tests[i] == AMD_IP_COMPUTE ? "COMPUTE":"GFX", it->name) {
+ igt_subtest_with_dynamic_f("amdgpu-%s-%s", ip_tests[i] == AMD_IP_COMPUTE ? "COMPUTE":
+ ip_tests[i] == AMD_IP_GFX ? "GFX":"SDMA", it->name) {
if (arr_cap[ip_tests[i]] && is_sub_test_queue_reset_enable(&gpu_info, it->exclude_filter, it) &&
get_next_rings(&ring_id_good, &ring_id_bad, info[0].available_rings,
info[i].available_rings, ip_background != ip_tests[i], &ring_id_job_good, &ring_id_job_bad)) {
igt_dynamic_f("amdgpu-%s-ring-good-%d-bad-%d-%s", it->name, ring_id_job_good, ring_id_job_bad,
- ip_tests[i] == AMD_IP_COMPUTE ? "COMPUTE":"GFX")
+ ip_tests[i] == AMD_IP_COMPUTE ? "COMPUTE":
+ ip_tests[i] == AMD_IP_GFX? "GFX":"SDMA")
set_next_test_to_run(sh_mem, it->test, ip_background, ip_tests[i], ring_id_job_good, ring_id_job_bad);
} else {
set_next_test_to_skip(sh_mem);
--
2.25.1
next reply other threads:[~2024-08-29 7:32 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-29 7:31 Jesse.zhang@amd.com [this message]
2024-08-29 8:57 ` ✓ CI.xeBAT: success for tests/amd_queue_reset: add sdma test in queue reset Patchwork
2024-08-29 9:02 ` ✓ Fi.CI.BAT: " Patchwork
2024-08-29 19:45 ` ✗ CI.xeFULL: failure " Patchwork
2024-08-30 7:34 ` ✓ Fi.CI.IGT: success " Patchwork
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