From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8612AD32D96 for ; Tue, 12 Nov 2024 11:47:35 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2DEB610E136; Tue, 12 Nov 2024 11:47:35 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="QPmKdl7l"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.18]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4E8E210E136 for ; Tue, 12 Nov 2024 11:47:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1731412053; x=1762948053; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=RNIihMOBduE4T7ine/hHYs5Ua8BDydsjgsXKE4J9afg=; b=QPmKdl7lO7/aCkH3+oVog4xed5ES6Ze+ZjQNZPym3yWYEfrEA4MHfGKK rQt7Hj+q6IV/G93/2N1B+DnrR2Qi+2kVdvDA/gfJxIu2pXaeyKuqfyhO/ 2nzzyKKR7uncXc21/0MLNqvg1uj47PuvAWMHM4SgEoJ2nu5zSp6C9xgga zuAnr3OmBSk15hFEsOzemYNF6JEVT4n+BUgDISARMpKAoz9mk5Gz/MRB3 dVXXyb2ATn/ZAij8gKSe5pOIqdBW3Ycd2oR3bH8GJtCB3KMuazQIe8nUm aT9FV+zEBcmQ7Wui0YiUp8gqQ6PBRENFHguCvJ/13707f31YjZ/g4OCiU w==; X-CSE-ConnectionGUID: HEHamRFbSYaVWEbPE5Mo+A== X-CSE-MsgGUID: kfqaIiFLSwODvV4hNKPnXA== X-IronPort-AV: E=McAfee;i="6700,10204,11222"; a="31414443" X-IronPort-AV: E=Sophos;i="6.11,199,1725346800"; d="scan'208";a="31414443" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by orvoesa110.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Nov 2024 03:47:33 -0800 X-CSE-ConnectionGUID: AzZ6dwlFQoerGx1xqqOGyQ== X-CSE-MsgGUID: 7SxRSB/qSeSTB/KS+DdmSw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,147,1728975600"; d="scan'208";a="87529059" Received: from nakshtra-system-product-name.iind.intel.com ([10.145.169.86]) by fmviesa008.fm.intel.com with ESMTP; 12 Nov 2024 03:47:31 -0800 From: nakshtra.goyal@intel.com To: igt-dev@lists.freedesktop.org, ramadevi.gandi@intel.com Cc: matthew.d.roper@intel.com Subject: [PATCH v3 i-g-t] tests/intel/xe_exec_reset: Add mocs reset test Date: Tue, 12 Nov 2024 17:19:22 +0530 Message-Id: <20241112114922.2734880-1-nakshtra.goyal@intel.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: igt-dev@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development mailing list for IGT GPU Tools List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: igt-dev-bounces@lists.freedesktop.org Sender: "igt-dev" From: Nakshtra Goyal v3: Correcting documentation for functionality and suspend resume to gt reset,adding required header. (Matt Roper) Signed-off-by: Nakshtra Goyal Reviewed-by: Matt Roper --- tests/intel/xe_exec_reset.c | 44 +++++++++++++++++++++++++++++++++++++ 1 file changed, 44 insertions(+) diff --git a/tests/intel/xe_exec_reset.c b/tests/intel/xe_exec_reset.c index 43ef1e334..a3eaf8bbf 100644 --- a/tests/intel/xe_exec_reset.c +++ b/tests/intel/xe_exec_reset.c @@ -12,6 +12,8 @@ * Test category: functionality test */ +#include + #include "igt.h" #include "lib/igt_syncobj.h" #include "lib/intel_reg.h" @@ -715,6 +717,44 @@ gt_reset(int fd, int n_threads, int n_sec) free(threads); } +/** + * SUBTEST: gt-mocs-reset + * Description: Validate mocs register contents over GT reset + * Test category: mocs + * + */ +static void +gt_mocs_reset(int fd, int gt) +{ + char path[256]; + + /* Mocs debugfs contents before and after GT reset. + * Allocate memory to store 10k characters sufficient enough + * to store global mocs and lncf mocs data. + */ + char *mocs_content_pre = (char *)malloc(10000 * sizeof(char)); + char *mocs_contents_post = (char *)malloc(10000 * sizeof(char)); + + igt_assert(mocs_content_pre); + igt_assert(mocs_contents_post); + + sprintf(path, "gt%d/mocs", gt); + igt_assert(igt_debugfs_exists(fd, path, O_RDONLY)); + igt_debugfs_dump(fd, path); + igt_debugfs_read(fd, path, mocs_content_pre); + + xe_force_gt_reset_sync(fd, gt); + + igt_assert(igt_debugfs_exists(fd, path, O_RDONLY)); + igt_debugfs_dump(fd, path); + igt_debugfs_read(fd, path, mocs_contents_post); + + igt_assert(strcmp(mocs_content_pre, mocs_contents_post) == 0); + + free(mocs_content_pre); + free(mocs_contents_post); +} + igt_main { struct drm_xe_engine_class_instance *hwe; @@ -820,6 +860,10 @@ igt_main igt_subtest("gt-reset-stress") gt_reset(fd, 4, 1); + igt_subtest("gt-mocs-reset") + xe_for_each_gt(fd, gt) + gt_mocs_reset(fd, gt); + igt_fixture drm_close_driver(fd); } -- 2.34.1