[PATCH i-g-t] tests/perf_pmu: Fix busy-double-start for GuC backend

[Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>]

On GuC-based platforms, backend could switch work at a very fast rate
determined by "timeslice_duration_ms". For a default value of 1 ms, the
switching latencies could add up really quickly over the test duration.
Choose a reasonable timeslice for this test so that expected and actual
busyness is within acceptable threshold. A 5ms timeslice works well for
this specific use case.

Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
 tests/intel/perf_pmu.c | 48 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 48 insertions(+)

diff --git a/tests/intel/perf_pmu.c b/tests/intel/perf_pmu.c
index 5d0467c02..1c0bafe82 100644
--- a/tests/intel/perf_pmu.c
+++ b/tests/intel/perf_pmu.c
@@ -441,6 +441,33 @@ busy_start(int gem_fd, const intel_ctx_t *ctx,
 	gem_quiescent_gpu(gem_fd);
 }
 
+static void set_timeslice(int cs, unsigned int value)
+{
+	unsigned int delay;
+
+	igt_debug("setting timeslice to %u ms\n", value);
+	igt_assert_lte(0, igt_sysfs_printf(cs, "timeslice_duration_ms", "%u", value));
+	igt_sysfs_scanf(cs, "timeslice_duration_ms", "%u", &delay);
+	igt_assert_eq(delay, value);
+}
+
+static int timeslice_fd(int fd, const struct intel_execution_engine2 *e)
+{
+	int sys, cs = -1;
+	char buf[32];
+
+	sys = igt_sysfs_open(fd);
+	igt_require(sys != -1);
+
+	snprintf(buf, sizeof(buf), "engine/%s", e->name);
+	cs = openat(sys, buf, O_RDONLY);
+	igt_require(cs != -1);
+
+	close(sys);
+
+	return cs;
+}
+
 /*
  * This test has a potentially low rate of catching the issue it is trying to
  * catch. Or in other words, quite high rate of false negative successes. We
@@ -456,6 +483,22 @@ busy_double_start(int gem_fd, const intel_ctx_t *ctx,
 	const intel_ctx_t *tmp_ctx;
 	int fd;
 	uint64_t ahnd = get_reloc_ahnd(gem_fd, ctx->id), ahndN;
+	unsigned int saved, cs;
+
+	/*
+	 * On GuC-based platforms, backend could switch work at a very fast rate
+	 * determined by "timeslice_duration_ms". For a default value of 1 ms,
+	 * the switching latencies could add up really quickly over the test
+	 * duration. Choose a reasonable timeslice for this test so that
+	 * expected and actual busyness is within acceptable threshold. A 5ms
+	 * timeslice works well for this specific use case.
+	 */
+	if (gem_using_guc_submission(gem_fd)) {
+		cs = timeslice_fd(gem_fd, e);
+		igt_assert(igt_sysfs_scanf(cs, "timeslice_duration_ms", "%u", &saved) == 1);
+		igt_debug("initial timeslice %u ms\n", saved);
+		set_timeslice(cs, 5);
+	}
 
 	tmp_ctx = intel_ctx_create(gem_fd, &ctx->cfg);
 	ahndN = get_reloc_ahnd(gem_fd, tmp_ctx->id);
@@ -510,6 +553,11 @@ busy_double_start(int gem_fd, const intel_ctx_t *ctx,
 	put_ahnd(ahnd);
 	put_ahnd(ahndN);
 
+	if (gem_using_guc_submission(gem_fd)) {
+		set_timeslice(cs, saved);
+		close(cs);
+	}
+
 	assert_within_epsilon(val, ts[1] - ts[0], tolerance);
 	igt_assert_eq(val2, 0);
 
-- 
2.43.0