From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 86C92C021B1 for ; Thu, 20 Feb 2025 12:21:51 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4606F10E4BD; Thu, 20 Feb 2025 12:21:51 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="ce7EwyA+"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.17]) by gabe.freedesktop.org (Postfix) with ESMTPS id C59A910E4BD for ; Thu, 20 Feb 2025 12:21:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1740054110; x=1771590110; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=adB+fKpU25K+GbrDcbZwk1c7ZFe3SOTD49NuDCrGnAY=; b=ce7EwyA+VmkVwYPhKnmUFjgwrKX9NhMzViPeln+iJl0BN0c5rOyRsi6T ChIy76WWzSaE8z2FPgyP1OjnBzVTyLOpfoj4WEuATeDPrXIl93trQpgA8 TJFl2llPc22O9eYsC1p76g2LzJ4AwUaA6qdyWepben96HLHULjOg+ACpr r3j5RKwD/GfyHAcyOX253LN//rQncSAuQSwV8pxHp7ZmRXJzoJlNdRsbe iro5X+GBcv55eA+Z4/hnrdRQOSrODuZA5z+xLJnAaMWB8FFelTE3vEqCW /wJULF2SgAtBYOatzzKzZuoveDfMm0AaXAIX7m+k0BDpe24nT/iXoUFM6 g==; X-CSE-ConnectionGUID: HfFCN2kTT0ebeYAWVxcWVA== X-CSE-MsgGUID: fas5Ev0nQ0WvMJwyA+L3DQ== X-IronPort-AV: E=McAfee;i="6700,10204,11351"; a="40697036" X-IronPort-AV: E=Sophos;i="6.13,301,1732608000"; d="scan'208";a="40697036" Received: from orviesa005.jf.intel.com ([10.64.159.145]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Feb 2025 04:21:50 -0800 X-CSE-ConnectionGUID: ZHlw5VWDSwSvrQM6EK6g0Q== X-CSE-MsgGUID: sQp0jeDsSVasZIqdYptAeQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="120251332" Received: from slindbla-desk.ger.corp.intel.com (HELO vgovind2-mobl3.intel.com) ([10.245.246.224]) by orviesa005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Feb 2025 04:21:48 -0800 From: Vinod Govindapillai To: igt-dev@lists.freedesktop.org Cc: vinod.govindapillai@intel.com, santhosh.reddy.guddati@intel.com, swati2.sharma@intel.com, jeevan.b@intel.com, jani.saarinen@intel.com Subject: [PATCH i-g-t v1 1/5] lib/i915/fbc: fbc psr combo support check helper function Date: Thu, 20 Feb 2025 14:21:27 +0200 Message-ID: <20250220122131.221907-2-vinod.govindapillai@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250220122131.221907-1-vinod.govindapillai@intel.com> References: <20250220122131.221907-1-vinod.govindapillai@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Content-Transfer-Encoding: 8bit X-BeenThere: igt-dev@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development mailing list for IGT GPU Tools List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: igt-dev-bounces@lists.freedesktop.org Sender: "igt-dev" Introduce a function which can check if the PSR and FBC combo is supported in a display version. Signed-off-by: Vinod Govindapillai --- lib/i915/intel_fbc.c | 18 ++++++++++++++++++ lib/i915/intel_fbc.h | 1 + 2 files changed, 19 insertions(+) diff --git a/lib/i915/intel_fbc.c b/lib/i915/intel_fbc.c index 2096bd996..90fe5943c 100644 --- a/lib/i915/intel_fbc.c +++ b/lib/i915/intel_fbc.c @@ -154,3 +154,21 @@ bool intel_fbc_plane_size_supported(int fd, uint32_t width, uint32_t height) return width <= max_w && height <= max_h; } + +/** + * intel_fbc_psr_combo_supported + * + * @fd: fd of the device + * + * FBC PSR combination support depends on the display version. + * + * Returns: + * true if FBC and PSR can be enabled together in a platform + */ +bool intel_fbc_psr_combo_supported(int device) +{ + if (intel_display_ver(intel_get_drm_devid(device)) >= 20) + return true; + + return false; +} diff --git a/lib/i915/intel_fbc.h b/lib/i915/intel_fbc.h index 5cca5dfd9..0abd18478 100644 --- a/lib/i915/intel_fbc.h +++ b/lib/i915/intel_fbc.h @@ -16,5 +16,6 @@ bool intel_fbc_wait_until_enabled(int device, enum pipe pipe); bool intel_fbc_is_enabled(int device, enum pipe pipe, int log_level); void intel_fbc_max_plane_size(int fd, uint32_t *width, uint32_t *height); bool intel_fbc_plane_size_supported(int device, uint32_t width, uint32_t height); +bool intel_fbc_psr_combo_supported(int device); #endif -- 2.43.0