From: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
To: igt-dev@lists.freedesktop.org
Cc: uma.shankar@intel.com, ramanaidu.naladala@intel.com,
mitulkumar.ajitkumar.golani@intel.com,
ankit.k.nautiyal@intel.com
Subject: [PATCH v1 1/2] tests/kms_vrr: Bucketize refresh rate tolerance
Date: Thu, 27 Mar 2025 14:10:25 +0530 [thread overview]
Message-ID: <20250327084027.622793-2-mitulkumar.ajitkumar.golani@intel.com> (raw)
In-Reply-To: <20250327084027.622793-1-mitulkumar.ajitkumar.golani@intel.com>
Reduce false failures while preserving timing accuracy. Introduce
a small tolerance buffer based on refresh rate which accounts for
HW/SW latency without compromising validation on HRR panel.
Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
---
tests/kms_vrr.c | 48 +++++++++++++++++++++++++++++++++++++++++++++---
1 file changed, 45 insertions(+), 3 deletions(-)
diff --git a/tests/kms_vrr.c b/tests/kms_vrr.c
index c4bb30f6a..cca2bce14 100644
--- a/tests/kms_vrr.c
+++ b/tests/kms_vrr.c
@@ -410,6 +410,50 @@ do_flip(data_t *data, igt_fb_t *fb)
igt_reset_timeout();
}
+static void
+calculate_tolerance(uint64_t *threshold_hi, uint64_t *threshold_lo, uint64_t rates_ns)
+{
+ if (NSECS_PER_SEC/rates_ns < 0)
+ return;
+
+ /*
+ * Current IGT implementation follows this sequence:
+ * 1. Perform a page flip (`do_flip`).
+ * 2. Wait for the flip completion event.
+ * 3. Compare the timestamp of the flip completion event with the previous frame’s completion timestamp.
+ * 4. Adjust CPU cycle burning based on the relative frame time.
+ *
+ * If a flip completes too early or too late, it is marked as out of tolerance.
+ * As a result, additional CPU cycles are burned to match the `target_ns`.
+ * Even if the next frame is on time, the total frame time now includes:
+ * Burned CPU cycle time (from the previous frame) + Flip completion event time.
+ * This leads to miscalculation, causing **false out-of-range detections**.
+ * The impact is more significant on High Refresh Rate (HRR) panels, where: The allowed tolerance
+ * window is smaller and more correction time is required. i.e. for 210hz (4.762ms), allowed range is
+ * 209hz(4.784ms) to 211hz(4.739ms). This comes just 23 microsecond tolerance, which is much lesser
+ * for accounting HW/SW latency, CPU burn cycle latency and correction logic applied in igt for
+ * validation.
+ *
+ * To address this implement a Bucketing Strategy:
+ * Provide a small tolerance buffer to allow IGT tests to account for correction. based on range of
+ * asked refresh rate. This prevents excessive failures due to minor timing adjustments.
+ * Although an imperical number but already IGT is living with that.
+ * This also ensures that asked refresh rate is not too off and always catch the real HW/software
+ * latencies.
+ */
+
+ if (rates_ns <= 120) {
+ *threshold_hi = NSECS_PER_SEC / (((float)NSECS_PER_SEC / rates_ns) + 1);
+ *threshold_lo = NSECS_PER_SEC / (((float)NSECS_PER_SEC / rates_ns) - 1);
+ } else if (rates_ns >= 120 && rates_ns <= 240) {
+ *threshold_hi = NSECS_PER_SEC / (((float)NSECS_PER_SEC / rates_ns) + 5);
+ *threshold_lo = NSECS_PER_SEC / (((float)NSECS_PER_SEC / rates_ns) - 5);
+ } else {
+ *threshold_hi = NSECS_PER_SEC / (((float)NSECS_PER_SEC / rates_ns) + 10);
+ *threshold_lo = NSECS_PER_SEC / (((float)NSECS_PER_SEC / rates_ns) - 10);
+ }
+}
+
/*
* Flips at the given rate and measures against the expected value.
* Returns the pass rate as a percentage from 0 - 100.
@@ -439,9 +483,7 @@ flip_and_measure(data_t *data, igt_output_t *output, enum pipe pipe,
else
exp_rate_ns = vtest_ns.max;
- /* Allow ~1 Hz deviation for different reasons causing delay. */
- threshold_hi[i] = NSECS_PER_SEC / (((float)NSECS_PER_SEC / exp_rate_ns) + 1);
- threshold_lo[i] = NSECS_PER_SEC / (((float)NSECS_PER_SEC / exp_rate_ns) - 1);
+ calculate_tolerance(&threshold_hi[i], &threshold_lo[i], exp_rate_ns);
igt_info("Requested rate[%d]: %"PRIu64" ns, Expected rate between: %"PRIu64" ns to %"PRIu64" ns\n",
i, rates_ns[i], threshold_hi[i], threshold_lo[i]);
--
2.48.1
next prev parent reply other threads:[~2025-03-27 8:42 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-27 8:40 [PATCH v1 0/2] Bucketize refresh rate tolerance Mitul Golani
2025-03-27 8:40 ` Mitul Golani [this message]
2025-03-27 8:40 ` [PATCH v1 2/2] HAX patch do not merge Mitul Golani
2025-03-27 11:21 ` ✗ Xe.CI.BAT: failure for Bucketize refresh rate tolerance Patchwork
2025-03-27 11:24 ` ✗ i915.CI.BAT: " Patchwork
2025-03-27 18:09 ` ✗ Xe.CI.Full: " Patchwork
2025-04-06 13:52 ` Patchwork
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