From: Matthew Auld <matthew.auld@intel.com>
To: igt-dev@lists.freedesktop.org
Cc: "Kamil Konieczny" <kamil.konieczny@linux.intel.com>,
"Thomas Hellström" <thomas.hellstrom@linux.intel.com>,
"Matthew Brost" <matthew.brost@intel.com>
Subject: [PATCH i-g-t v2] tests/intel/xm_vm: add coverage for userptr transparent huge pages
Date: Fri, 28 Mar 2025 18:19:37 +0000 [thread overview]
Message-ID: <20250328181937.293014-1-matthew.auld@intel.com> (raw)
In particular we are missing something to test partially mapping a
huge-page, including being misaligned, such that the mm start and end
address don't sit on the huge-page boundary.
v2:
- Fully expand thp term (Kamil)
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Kamil Konieczny <kamil.konieczny@linux.intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
---
tests/intel/xe_vm.c | 55 +++++++++++++++++++++++++++++++++++++++++----
1 file changed, 51 insertions(+), 4 deletions(-)
diff --git a/tests/intel/xe_vm.c b/tests/intel/xe_vm.c
index fdf74c114..af4013f5e 100644
--- a/tests/intel/xe_vm.c
+++ b/tests/intel/xe_vm.c
@@ -1281,6 +1281,7 @@ test_bind_array_conflict(int fd, struct drm_xe_engine_class_instance *eci,
#define LARGE_BIND_FLAG_MISALIGNED (0x1 << 0)
#define LARGE_BIND_FLAG_SPLIT (0x1 << 1)
#define LARGE_BIND_FLAG_USERPTR (0x1 << 2)
+#define LARGE_BIND_FLAG_USERPTR_THP (0x1 << 3)
/**
* SUBTEST: %s-%ld
@@ -1312,6 +1313,9 @@ test_bind_array_conflict(int fd, struct drm_xe_engine_class_instance *eci,
* @large-userptr-split-binds: large-userptr-split-binds
* @large-userptr-misaligned-binds: large-userptr-misaligned-binds
* @large-userptr-split-misaligned-binds: large-userptr-split-misaligned-binds
+ * @large-userptr-thp-split-binds: large-userptr-split-binds with transparent-huge-page
+ * @large-userptr-thp-misaligned-binds: large-userptr-misaligned-binds with transparent-huge-page
+ * @large-userptr-thp-split-misaligned-binds: large-userptr-split-misaligned-binds with transparent-huge-page
*
* arg[2].values: 2097152, 4194304, 8388608, 16777216, 33554432
* arg[2].values: 67108864, 134217728, 268435456, 536870912, 1073741824
@@ -1363,7 +1367,7 @@ test_large_binds(int fd, struct drm_xe_engine_class_instance *eci,
.num_syncs = 2,
.syncs = to_user_pointer(sync),
};
- size_t bo_size_prefetch, padding;
+ size_t bo_size_prefetch, padding, map_padding = 0;
uint64_t addr = 0x1ull << 30, base_addr = 0x1ull << 30;
uint32_t vm;
uint32_t exec_queues[MAX_N_EXEC_QUEUES];
@@ -1387,8 +1391,23 @@ test_large_binds(int fd, struct drm_xe_engine_class_instance *eci,
if (flags & LARGE_BIND_FLAG_USERPTR) {
bo_size_prefetch = xe_bb_size(fd, bo_size);
- map = aligned_alloc(xe_get_default_alignment(fd), bo_size_prefetch);
- igt_assert(map);
+
+ if (flags & LARGE_BIND_FLAG_USERPTR_THP) {
+ /* Ensure we try to partially map a transparent-huge-page */
+ if (flags & LARGE_BIND_FLAG_MISALIGNED)
+ map_padding = xe_get_default_alignment(fd);
+
+ map = aligned_alloc(xe_get_default_alignment(fd),
+ bo_size_prefetch + map_padding * 2);
+ igt_assert(map);
+ madvise(map, bo_size_prefetch + map_padding * 2,
+ MADV_HUGEPAGE);
+ map += map_padding;
+ } else {
+ map = aligned_alloc(xe_get_default_alignment(fd),
+ bo_size_prefetch);
+ igt_assert(map);
+ }
} else {
igt_skip_on(xe_visible_vram_size(fd, 0) && bo_size >
xe_visible_vram_size(fd, 0));
@@ -1500,7 +1519,7 @@ test_large_binds(int fd, struct drm_xe_engine_class_instance *eci,
munmap(map, bo_size);
gem_close(fd, bo);
} else {
- free(map);
+ free(map - map_padding);
}
xe_vm_destroy(fd, vm);
}
@@ -2620,6 +2639,34 @@ igt_main
LARGE_BIND_FLAG_USERPTR);
break;
}
+ igt_subtest_f("large-userptr-thp-split-binds-%lld",
+ (long long)bind_size)
+ xe_for_each_engine(fd, hwe) {
+ test_large_binds(fd, hwe, 4, 16, bind_size,
+ LARGE_BIND_FLAG_SPLIT |
+ LARGE_BIND_FLAG_USERPTR |
+ LARGE_BIND_FLAG_USERPTR_THP);
+ break;
+ }
+ igt_subtest_f("large-userptr-thp-misaligned-binds-%lld",
+ (long long)bind_size)
+ xe_for_each_engine(fd, hwe) {
+ test_large_binds(fd, hwe, 4, 16, bind_size,
+ LARGE_BIND_FLAG_MISALIGNED |
+ LARGE_BIND_FLAG_USERPTR |
+ LARGE_BIND_FLAG_USERPTR_THP);
+ break;
+ }
+ igt_subtest_f("large-userptr-thp-split-misaligned-binds-%lld",
+ (long long)bind_size)
+ xe_for_each_engine(fd, hwe) {
+ test_large_binds(fd, hwe, 4, 16, bind_size,
+ LARGE_BIND_FLAG_SPLIT |
+ LARGE_BIND_FLAG_MISALIGNED |
+ LARGE_BIND_FLAG_USERPTR |
+ LARGE_BIND_FLAG_USERPTR_THP);
+ break;
+ }
}
bind_size = (0x1ull << 21) + (0x1ull << 20);
--
2.48.1
next reply other threads:[~2025-03-28 18:20 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-28 18:19 Matthew Auld [this message]
2025-03-29 4:08 ` ✗ i915.CI.BAT: failure for tests/intel/xm_vm: add coverage for userptr transparent huge pages Patchwork
2025-03-29 4:16 ` ✓ Xe.CI.BAT: success " Patchwork
2025-03-29 22:45 ` ✗ Xe.CI.Full: failure " Patchwork
2025-04-06 20:21 ` Patchwork
2025-04-18 14:30 ` [PATCH i-g-t v2] " Kamil Konieczny
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