From: Matthew Auld <matthew.auld@intel.com>
To: igt-dev@lists.freedesktop.org
Cc: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>,
"Sanjay Yadav" <sanjay.kumar.yadav@intel.com>
Subject: [PATCH i-g-t v2 2/2] tests/intel/xe_peer2peer: gracefully handle ENOSUP
Date: Mon, 3 Nov 2025 13:12:46 +0000 [thread overview]
Message-ID: <20251103131244.28703-4-matthew.auld@intel.com> (raw)
In-Reply-To: <20251103131244.28703-3-matthew.auld@intel.com>
Currently this blows up on the multi-dGPU setup we have in CI when
importing the VRAM from one device into the other via dma-buf, due the
P2P internals reporting this as unsupported on this machine. Trying to
manually white list the hostbridge device on the P2P side is also
unsuccessful since the read side test fails due to a data mismatch when
reading from the exported VRAM. There are also no hangs or errors in
dmesg although strangely the write side test passes. So it appears that
the direction of the copy is broken when reading the exported VRAM from
the importer side. Manually disabling/enabling iommu also make no
difference. And finally hacking the test to force same device
import/export makes the test pass, which should rule out any kind of
test defect. With that gracefully skip running the VRAM import subtests
if this is reported as unsupported by the kernel.
Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/6433
Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/1173
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Cc: Sanjay Yadav <sanjay.kumar.yadav@intel.com>
---
tests/intel/xe_peer2peer.c | 39 ++++++++++++++++++++++++++------------
1 file changed, 27 insertions(+), 12 deletions(-)
diff --git a/tests/intel/xe_peer2peer.c b/tests/intel/xe_peer2peer.c
index b777d2b66..70374e56d 100644
--- a/tests/intel/xe_peer2peer.c
+++ b/tests/intel/xe_peer2peer.c
@@ -116,11 +116,24 @@ static void test_read(struct gpu_info *ex_gpu, struct gpu_info *im_gpu,
uint32_t im_xe = im_gpu->fd;
uint32_t ex_src, dmabuf;
uint32_t stride;
-
struct drm_xe_engine_class_instance inst = {
.engine_class = DRM_XE_ENGINE_CLASS_COPY,
};
intel_ctx_t *ctx;
+ int err;
+
+ blt_copy_init(ex_xe, &ex_blt);
+ src = blt_create_object(&ex_blt, ex_reg, width, height, bpp, 0,
+ T_LINEAR, COMPRESSION_DISABLED, 0, true);
+
+ dmabuf = prime_handle_to_fd(ex_xe, src->handle);
+ err = __prime_fd_to_handle(im_xe, dmabuf, &ex_src);
+ if (err == -ENOTSUP) {
+ blt_destroy_object(ex_xe, src);
+ igt_assert(ex_reg != system_memory(ex_xe));
+ igt_skip("P2P VRAM import not supported on this device, skipping.\n");
+ }
+ igt_assert(!err);
vm = xe_vm_create(im_xe, 0, 0);
exec_queue = xe_exec_queue_create(im_xe, vm, &inst, 0);
@@ -129,17 +142,12 @@ static void test_read(struct gpu_info *ex_gpu, struct gpu_info *im_gpu,
INTEL_ALLOCATOR_SIMPLE,
ALLOC_STRATEGY_LOW_TO_HIGH, 0);
- blt_copy_init(ex_xe, &ex_blt);
blt_copy_init(im_xe, &im_blt);
- src = blt_create_object(&ex_blt, ex_reg, width, height, bpp, 0,
- T_LINEAR, COMPRESSION_DISABLED, 0, true);
dst = blt_create_object(&im_blt, im_reg, width, height, bpp, 0,
T_LINEAR, COMPRESSION_DISABLED, 0, true);
blt_surface_fill_rect(ex_xe, src, width, height);
- dmabuf = prime_handle_to_fd(ex_xe, src->handle);
- ex_src = prime_fd_to_handle(im_xe, dmabuf);
im_src = calloc(1, sizeof(*im_src));
stride = width * 4;
@@ -198,11 +206,23 @@ static void test_write(struct gpu_info *ex_gpu, struct gpu_info *im_gpu,
uint32_t im_xe = im_gpu->fd;
uint32_t ex_dst, dmabuf;
uint32_t stride;
-
struct drm_xe_engine_class_instance inst = {
.engine_class = DRM_XE_ENGINE_CLASS_COPY,
};
intel_ctx_t *ctx;
+ int err;
+
+ blt_copy_init(ex_xe, &ex_blt);
+ dst = blt_create_object(&ex_blt, ex_reg, width, height, bpp, 0,
+ T_LINEAR, COMPRESSION_DISABLED, 0, true);
+ dmabuf = prime_handle_to_fd(ex_xe, dst->handle);
+ err = __prime_fd_to_handle(im_xe, dmabuf, &ex_dst);
+ if (err == -ENOTSUP) {
+ blt_destroy_object(ex_xe, dst);
+ igt_assert(ex_reg != system_memory(ex_xe));
+ igt_skip("P2P VRAM import not supported on this device, skipping.\n");
+ }
+ igt_assert(!err);
vm = xe_vm_create(im_xe, 0, 0);
exec_queue = xe_exec_queue_create(im_xe, vm, &inst, 0);
@@ -211,17 +231,12 @@ static void test_write(struct gpu_info *ex_gpu, struct gpu_info *im_gpu,
INTEL_ALLOCATOR_SIMPLE,
ALLOC_STRATEGY_LOW_TO_HIGH, 0);
- blt_copy_init(ex_xe, &ex_blt);
blt_copy_init(im_xe, &im_blt);
- dst = blt_create_object(&ex_blt, ex_reg, width, height, bpp, 0,
- T_LINEAR, COMPRESSION_DISABLED, 0, true);
src = blt_create_object(&im_blt, im_reg, width, height, bpp, 0,
T_LINEAR, COMPRESSION_DISABLED, 0, true);
blt_surface_fill_rect(im_xe, src, width, height);
- dmabuf = prime_handle_to_fd(ex_xe, dst->handle);
- ex_dst = prime_fd_to_handle(im_xe, dmabuf);
im_dst = calloc(1, sizeof(*im_dst));
stride = width * 4;
--
2.51.1
next prev parent reply other threads:[~2025-11-03 13:13 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-03 13:12 [PATCH i-g-t v2 1/2] lib/ioct_wrappers: add __prime_fd_to_handle() Matthew Auld
2025-11-03 13:12 ` Matthew Auld [this message]
2025-11-04 11:39 ` [PATCH i-g-t v2 2/2] tests/intel/xe_peer2peer: gracefully handle ENOSUP Kamil Konieczny
2025-11-04 0:44 ` ✓ i915.CI.BAT: success for series starting with [i-g-t,v2,1/2] lib/ioct_wrappers: add __prime_fd_to_handle() Patchwork
2025-11-04 1:15 ` ✗ Xe.CI.BAT: failure " Patchwork
2025-11-04 11:00 ` [PATCH i-g-t v2 1/2] " Kamil Konieczny
2025-11-04 12:43 ` ✗ i915.CI.Full: failure for series starting with [i-g-t,v2,1/2] " Patchwork
2025-11-04 14:13 ` ✗ Xe.CI.Full: " Patchwork
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