From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9E3E7D3E79C for ; Thu, 11 Dec 2025 07:27:38 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 55FD410E734; Thu, 11 Dec 2025 07:27:38 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="XvzbpFf9"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.13]) by gabe.freedesktop.org (Postfix) with ESMTPS id 526FE10E6DE for ; Thu, 11 Dec 2025 07:27:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1765438053; x=1796974053; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=RmiawDeYXTLIVMkgLoJbm+X99dHzfOg9WBP0QX9v2/o=; b=XvzbpFf9MR/013kyL1sr5dJXwUUVO9qMFu5iZBOCGQRjKk9AdqZ6BxRg fuOGXc98nbw/tZ/lAo9qyXFX8Z0+3huTQqnZPzI7DR3dhgtZynz80lzsZ 3ngKZnlzNMIJMp9THb1pCplLZnPtgmS4dlgU/9Ebn7nrCd2cd2uRBsUeO McBy82o1ysfl/55ls7be9kQVsXpSRVG14SPyhAewCEyOHHh3NbvFaY2W+ N/ikNDb4yObTLcKzxPTiy+T5vvlfrPkGRQ0jvr/q/csvUUQ/Pfp9WG+To DZDk+Klz+/NK9NYr09MoCpt+Cpbaj+xEEu1oFX+bpkeno8xjwdkjMpP9A A==; X-CSE-ConnectionGUID: quOos9JPSzu4M7FwnrkGhQ== X-CSE-MsgGUID: rT3SDGZ6QqKgO3VfYAyhEA== X-IronPort-AV: E=McAfee;i="6800,10657,11638"; a="70000127" X-IronPort-AV: E=Sophos;i="6.20,265,1758610800"; d="scan'208";a="70000127" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by fmvoesa107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Dec 2025 23:27:32 -0800 X-CSE-ConnectionGUID: Y1R2opTgT664SsKn3T1Jzw== X-CSE-MsgGUID: 5fkuV7JiS3GRzhKsBeE+eA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.20,265,1758610800"; d="scan'208";a="195989635" Received: from dut6304bmgfrd.fm.intel.com ([10.36.21.69]) by orviesa010.jf.intel.com with ESMTP; 10 Dec 2025 23:27:32 -0800 From: Xin Wang To: igt-dev@lists.freedesktop.org Cc: alex.zuo@intel.com, Xin Wang , Matthew Auld Subject: [PATCH v4 2/2] tests/intel/xe_pat: sync with Xe PAT debugfs parser Date: Thu, 11 Dec 2025 07:27:28 +0000 Message-ID: <20251211072730.178836-3-x.wang@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251211072730.178836-1-x.wang@intel.com> References: <20251210052327.149365-1-x.wang@intel.com> <20251211072730.178836-1-x.wang@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: igt-dev@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development mailing list for IGT GPU Tools List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: igt-dev-bounces@lists.freedesktop.org Sender: "igt-dev" Pull in the Xe PAT table parsed by lib/intel_pat so Xe2+ tests use the driver-provided entries instead of hard-coded reservations. CC: Matthew Auld Signed-off-by: Xin Wang Reviewed-by: Matthew Auld --- tests/intel/xe_pat.c | 38 ++++++++++++++++++++++++++++++++++++-- 1 file changed, 36 insertions(+), 2 deletions(-) diff --git a/tests/intel/xe_pat.c b/tests/intel/xe_pat.c index 59dfb6b11..ef517e5f4 100644 --- a/tests/intel/xe_pat.c +++ b/tests/intel/xe_pat.c @@ -77,6 +77,18 @@ static void userptr_coh_none(int fd) xe_vm_destroy(fd, vm); } +#define BITS_TO(n) (n >= sizeof(long) * 8 ? ~0 : (1UL << (n)) - 1) +#define BITMASK(high, low) (uint32_t)(BITS_TO(high+1) & ~BITS_TO(low)) +#define FIELD_GET(val, high, low) (((val) & (BITMASK(high, low))) >> (low)) +#define FIELD_GET_BIT(val, n) FIELD_GET(val, n, n) + +#define XE_NO_PROMOTE(val) FIELD_GET_BIT(val, 10) +#define XE_COMP_EN(val) FIELD_GET_BIT(val, 9) +#define XE_L3_CLOS(val) FIELD_GET(val, 7, 6) +#define XE_L3_POLICY(val) FIELD_GET(val, 5, 4) +#define XE_L4_POLICY(val) FIELD_GET(val, 3, 2) +#define XE_COH_MODE(val) FIELD_GET(val, 1, 0) + /** * SUBTEST: pat-index-all * Test category: functionality test @@ -86,6 +98,7 @@ static void pat_index_all(int fd) { uint16_t dev_id = intel_get_drm_devid(fd); size_t size = xe_get_default_alignment(fd); + struct xe_pat_entry *xe_pat_table; uint32_t vm, bo; uint8_t pat_index; @@ -114,10 +127,31 @@ static void pat_index_all(int fd) igt_assert(intel_get_max_pat_index(fd)); + if (intel_graphics_ver(dev_id) >= IP_VER(20, 0)) { + /* Get the Xe PAT software configuration from the cached xe_dev structure */ + struct xe_device *xe_dev = xe_device_get(fd); + xe_pat_table = xe_dev->pat_sw_config.entries; + for (int i = 0; i < xe_dev->pat_sw_config.max_index + 1; i++) { + uint32_t pat = xe_pat_table[i].pat; + igt_debug("PAT[%2d] = [ %u, %u, %u, %u, %u, %u] (%#8x)%s\n", i, + XE_NO_PROMOTE(pat), + XE_COMP_EN(pat), + XE_L3_CLOS(pat), + XE_L3_POLICY(pat), + XE_L4_POLICY(pat), + XE_COH_MODE(pat), + pat, + xe_pat_table[i].rsvd ? " *" : ""); + } + } + for (pat_index = 0; pat_index <= intel_get_max_pat_index(fd); pat_index++) { - if (intel_get_device_info(dev_id)->graphics_ver >= 20 && - pat_index >= 16 && pat_index <= 19) { /* hw reserved */ + + bool hw_reserved = intel_graphics_ver(dev_id) >= IP_VER(20, 0) ? + xe_pat_table[pat_index].rsvd : false; + + if (hw_reserved) { igt_assert_eq(__xe_vm_bind(fd, vm, 0, bo, 0, 0x40000, size, DRM_XE_VM_BIND_OP_MAP, 0, NULL, 0, 0, pat_index, 0), -- 2.43.0