Re: [PATCH i-g-t v2 3/3] tests/panthor: Add scheduler tests

[Boris Brezillon <boris.brezillon@collabora.com>]

On Wed, 3 Dec 2025 16:31:59 -0300
Daniel Almeida <daniel.almeida@collabora.com> wrote:

[...]
> > diff --git a/tests/panthor/panthor_sched.c b/tests/panthor/panthor_sched.c
> > new file mode 100644
> > index 000000000000..7cded16c0acd
> > --- /dev/null
> > +++ b/tests/panthor/panthor_sched.c
> > @@ -0,0 +1,338 @@
> > +// SPDX-License-Identifier: MIT
> > +// SPDX-FileCopyrightText: Copyright (C) 2025 Collabora Ltd.
> > +
> > +#include <stdint.h>
> > +#include <sys/mman.h>
> > +#include <unistd.h>
> > +
> > +#include "drm.h"
> > +#include "igt.h"
> > +#include "igt_core.h"
> > +#include "igt_panthor.h"
> > +#include "panthor_drm.h"
> > +
> > +static size_t
> > +infinite_incr_loop(uint64_t *cs, uint64_t counter_va)
> > +{
> > + const uint8_t counter_va_reg = 68;
> > + const uint8_t val_reg = 70;
> > + uint64_t instrs[] = {
> > + /* Load the source register ([r68; r69]) with the kernel address */
> > + cs_mov48(counter_va_reg, counter_va),
> > + /* Load a 0 into r70 */  
> 
> Load a 1

Oops, will fix the comment.

> 
> > + cs_mov48(val_reg, 1),
> > + /* STORE_MULTIPLE: Store the first register to the address pointed to by
> > + * [r68; r69]
> > + */
> > + cs_stm64(counter_va_reg, val_reg, 0),
> > + cs_wait(1, false),  
> 
> Wait for what? All of these seem to be synchronous instructions?

Nope, load/store instructions are asynchronous, you need to wait for
the SB assigned to "other-asynchronous-ops" (defaults to zero) for the
mem operation to be effective.

> 
> > + cs_add64(1, val_reg, val_reg),
> > + cs_branch(-4, CS_BRANCH_COND_ALWAYS, 0),
> > + };

> 
> This looks good, but I tried it and this is the result:

If you're not testing with drm-misc-next, that's normal. Those tests
are added to make sure we don't regress those scheduling cases again.