From: Jia Yao <jia.yao@intel.com>
To: igt-dev@lists.freedesktop.org
Cc: Jia Yao <jia.yao@intel.com>, Alex Zuo <alex.zuo@intel.com>,
Shuicheng Lin <shuicheng.lin@intel.com>,
Xin Wang <x.wang@intel.com>
Subject: [PATCH] tests/intel/xe_exec_system_allocator: Fix UC PAT case timeout
Date: Wed, 28 Jan 2026 16:45:17 +0000 [thread overview]
Message-ID: <20260128164518.44353-1-jia.yao@intel.com> (raw)
The pat-index-madvise-pat-idx-uc-single-vma subtest was intermittently
failing with 'Timer expired' error when waiting for user fence.
Root cause:
When the PAT index is set to UC (Uncached), the batch buffer written
by CPU may not be visible to GPU due to CPU cache not being flushed
to memory. The GPU would then read stale or corrupted batch commands,
causing the execution to hang and the user fence to never be signaled.
Fix:
- Use igt_clflush_range() to explicitly flush the batch buffer from
CPU cache to memory before GPU execution
- Initialize clflush support in igt_fixture with igt_setup_clflush()
v2 (Xin Wang):
- Move igt_setup_clflush() from igt_fixture to just before
xe_for_each_engine loop for UC PAT index subtests. This ensures
clflush is only initialized when actually needed, and allows
proper skip if clflush is not supported on the platform.
This ensures that when using UC PAT index, the GPU can read the
correct batch buffer data from memory.
Cc: Alex Zuo <alex.zuo@intel.com>
Cc: Shuicheng Lin <shuicheng.lin@intel.com>
Cc: Xin Wang <x.wang@intel.com>
Signed-off-by: Jia Yao <jia.yao@intel.com>
---
tests/intel/xe_exec_system_allocator.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/tests/intel/xe_exec_system_allocator.c b/tests/intel/xe_exec_system_allocator.c
index 412ad0384..2938b3c87 100644
--- a/tests/intel/xe_exec_system_allocator.c
+++ b/tests/intel/xe_exec_system_allocator.c
@@ -1692,6 +1692,10 @@ test_exec(int fd, struct drm_xe_engine_class_instance *eci,
prefetch_ns += (end - start);
}
+ if (pat_value == intel_get_pat_idx_uc ||
+ pat_value == intel_get_pat_idx_uc_comp)
+ igt_clflush_range(data[idx].batch, sizeof(data[idx].batch));
+
sync[0].addr = exec_ufence ? to_user_pointer(exec_ufence) :
addr + (char *)&data[idx].exec_sync - (char *)data;
@@ -2633,6 +2637,11 @@ int igt_main()
!xe_has_vram(fd)) {
igt_skip("Skipping compression-related PAT index\n");
}
+ if (strstr(s->name, "madvise-pat-idx-uc-")) {
+ igt_require_f(igt_setup_clflush(),
+ "CLFLUSH support required for UC PAT index test\n");
+ }
+
xe_for_each_engine(fd, hwe)
test_exec(fd, hwe, 1, 1, SZ_4M, 0, 0, NULL, NULL, s->flags, s->fn);
}
--
2.43.0
next reply other threads:[~2026-01-29 9:51 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-28 16:45 Jia Yao [this message]
2026-01-29 13:35 ` ✓ Xe.CI.BAT: success for tests/intel/xe_exec_system_allocator: Fix UC PAT case timeout Patchwork
2026-01-29 13:55 ` ✓ i915.CI.BAT: " Patchwork
2026-01-29 20:26 ` ✗ i915.CI.Full: failure " Patchwork
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