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* [PATCH i-g-t] tests/intel/kms_cdclk: Skip CDCLK bump validation on connectors with fixed modes
@ 2026-02-20 11:45 Swati Sharma
  2026-02-20 12:31 ` ✓ Xe.CI.BAT: success for " Patchwork
                   ` (3 more replies)
  0 siblings, 4 replies; 5+ messages in thread
From: Swati Sharma @ 2026-02-20 11:45 UTC (permalink / raw)
  To: igt-dev; +Cc: Swati Sharma

eDP panels and some other connectors may expose a fixed or very limited
set of modes, often differing only in refresh rate. In such cases, the
computed CDCLK requirement for both low and high refresh modes can end
up identical.

Since no CDCLK recomputation or bump is expected in this scenario,
validating CDCLK bump behavior on such connectors can lead to false
test failures.

Skip CDCLK bump validation on connectors that expose fixed modes
and restrict testing to outputs where mode variation meaningfully
exercises CDCLK recomputation.

Signed-off-by: Swati Sharma <swati2.sharma@intel.com>
---
 tests/intel/kms_cdclk.c | 29 +++++++++++++++++++++++++++++
 1 file changed, 29 insertions(+)

diff --git a/tests/intel/kms_cdclk.c b/tests/intel/kms_cdclk.c
index eb8b79c44..84394723a 100644
--- a/tests/intel/kms_cdclk.c
+++ b/tests/intel/kms_cdclk.c
@@ -72,6 +72,15 @@ static bool hardware_supported(data_t *data)
 	return false;
 }
 
+static bool has_scaling_mode_prop(data_t *data, igt_output_t *output)
+{
+	return kmstest_get_property(data->drm_fd,
+				    output->id,
+				    DRM_MODE_OBJECT_CONNECTOR,
+				    "scaling mode",
+				    NULL, NULL, NULL);
+}
+
 static __u64 get_mode_data_rate(drmModeModeInfo *mode)
 {
 	__u64 data_rate = (__u64)mode->hdisplay * (__u64)mode->vdisplay * (__u64)mode->vrefresh;
@@ -329,6 +338,26 @@ static void run_cdclk_test(data_t *data, uint32_t flags)
 	igt_crtc_t *crtc;
 
 	for_each_crtc_with_valid_output(display, crtc, output) {
+                /*
+		 * Some connectors (eg. embedded panels) expose a fixed or
+	         * very limited set of modes, often only differing in refresh
+	         * rate. In such cases, the required CDCLK for both low and
+	         * high refresh modes may end up identical.
+	         *
+	         * Since no CDCLK recomputation or bump is expected for such
+	         * connectors, validating CDCLK bump behavior would lead to
+	         * false negatives.
+	         *
+	         * Skip CDCLK bump validation on connectors exposing fixed
+	         * modes and restrict testing to outputs where mode variation
+		 * can meaningfully exercise CDCLK changes.
+	         */
+		if (!has_scaling_mode_prop(data, output)) {
+			igt_info("Skipping: CDCLK bump validation on %s: "
+				 "connector exposes fixed/limited modes\n", output->name);
+			continue;
+		}
+
 		igt_output_set_crtc(output,
 				    crtc);
 		if (!intel_pipe_output_combo_valid(display)) {
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 5+ messages in thread
end of thread, other threads:[~2026-02-20 23:56 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
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2026-02-20 11:45 [PATCH i-g-t] tests/intel/kms_cdclk: Skip CDCLK bump validation on connectors with fixed modes Swati Sharma
2026-02-20 12:31 ` ✓ Xe.CI.BAT: success for " Patchwork
2026-02-20 12:39 ` ✓ i915.CI.BAT: " Patchwork
2026-02-20 15:20 ` ✗ i915.CI.Full: failure " Patchwork
2026-02-20 23:56 ` ✗ Xe.CI.FULL: " Patchwork

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