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From: Nitin Gote <nitin.r.gote@intel.com>
To: igt-dev@lists.freedesktop.org
Cc: kamil.konieczny@intel.com
Subject: [PATCH] tests/intel/xe_configfs: Fix ctx-restore subtests register
Date: Wed, 15 Apr 2026 11:51:38 +0530	[thread overview]
Message-ID: <20260415062137.745993-2-nitin.r.gote@intel.com> (raw)

The ctx-restore-post-bb and ctx-restore-mid-bb subtests fail due to
two independent issues:

1. Register not suitable for software use: The test uses GEN7_GT_SCRATCH
   (0x4f100/0x4f104), which per BSpec is reserved for hardware use and
   must not be used by software. Readback may not return the expected
   value.

2. No render engine on XPC/HPC platforms: The test uses "rcs" (render
   engine class), but XPC platforms like CRI (Xe3p_XPC) and HPC
   platforms like PVC (Xe_HPC) have no Render Command Streamer. The BB
   is stored via configfs but never injected into any engine's LRC.

Fix by:
- Replacing GEN7_GT_SCRATCH with CCS0 CS_GPR3/GPR4 (0x1a618/0x1a620),
  MI_MATH scratch registers safe for software use. LRI writes go
  through global MMIO space, so rcs engine can write to CCS0 register
  addresses.
- Adding igt_require_f(has_rcs) to skip ctx-restore subtests on
  platforms without a render engine instead of failing silently.

Bspec: 53105, 60309

Fixes: b6abdc26e01b ("tests/intel/xe_configfs: Check ctx_restore_post_bb")
Signed-off-by: Nitin Gote <nitin.r.gote@intel.com>
---
 tests/intel/xe_configfs.c | 46 ++++++++++++++++++++++++---------------
 1 file changed, 29 insertions(+), 17 deletions(-)

diff --git a/tests/intel/xe_configfs.c b/tests/intel/xe_configfs.c
index 755524e7c..1447edf2b 100644
--- a/tests/intel/xe_configfs.c
+++ b/tests/intel/xe_configfs.c
@@ -276,35 +276,35 @@ static void test_ctx_restore(int configfs_device_fd, const char *type)
 		 * previous execution set a specific value in the HW
 		 */
 		{ .test = "cmd-single",
-		  .in = "rcs cmd 11000001 4F100 DEA0BEE0",
-		  .out = "rcs: 11000001 0004f100 dea0bee0\n",
-		  .reg = { 0x4f100 },
+		  .in = "rcs cmd 11000001 1A618 DEA0BEE0",
+		  .out = "rcs: 11000001 0001a618 dea0bee0\n",
+		  .reg = { 0x1a618 },
 		  .reg_val = { 0xdea0bee0 },
 		},
 		{ .test = "cmd-single-multi-values",
-		  .in = "rcs cmd 11000003 4F100 DEA1BEE1 4F104 DEA2BEE2",
-		  .out = "rcs: 11000003 0004f100 dea1bee1 0004f104 dea2bee2\n",
-		  .reg = { 0x4f100, 0x4f104 },
+		  .in = "rcs cmd 11000003 1A618 DEA1BEE1 1A620 DEA2BEE2",
+		  .out = "rcs: 11000003 0001a618 dea1bee1 0001a620 dea2bee2\n",
+		  .reg = { 0x1a618, 0x1a620 },
 		  .reg_val = { 0xdea1bee1, 0xdea2bee2 },
 		},
 		{ .test = "cmd-multi",
-		  .in = "rcs cmd 11000001 4F100 DEA3BEE3\n"
-			"rcs cmd 11000001 4F104 DEA4BEE4",
-		  .out = "rcs: 11000001 0004f100 dea3bee3 11000001 0004f104 dea4bee4\n",
-		  .reg = { 0x4f100, 0x4f104 },
+		  .in = "rcs cmd 11000001 1A618 DEA3BEE3\n"
+			"rcs cmd 11000001 1A620 DEA4BEE4",
+		  .out = "rcs: 11000001 0001a618 dea3bee3 11000001 0001a620 dea4bee4\n",
+		  .reg = { 0x1a618, 0x1a620 },
 		  .reg_val = { 0xdea3bee3, 0xdea4bee4 },
 		},
 		{ .test = "reg-single",
-		  .in = "rcs reg 4F100 DEA5BEE5",
-		  .out = "rcs: 11000001 0004f100 dea5bee5\n",
-		  .reg = { 0x4f100 },
+		  .in = "rcs reg 1A618 DEA5BEE5",
+		  .out = "rcs: 11000001 0001a618 dea5bee5\n",
+		  .reg = { 0x1a618 },
 		  .reg_val = { 0xdea5bee5 },
 		},
 		{ .test = "reg-multi",
-		  .in = "rcs reg 4F100 DEA6BEE6\n"
-			"rcs reg 4F104 DEA7BEE7",
-		  .out = "rcs: 11000001 0004f100 dea6bee6 11000001 0004f104 dea7bee7\n",
-		  .reg = { 0x4f100, 0x4f104 },
+		  .in = "rcs reg 1A618 DEA6BEE6\n"
+			"rcs reg 1A620 DEA7BEE7",
+		  .out = "rcs: 11000001 0001a618 dea6bee6 11000001 0001a620 dea7bee7\n",
+		  .reg = { 0x1a618, 0x1a620 },
 		  .reg_val = { 0xdea6bee6, 0xdea7bee7 },
 		},
 	};
@@ -364,12 +364,22 @@ int igt_main()
 	int fd, configfs_fd, configfs_device_fd;
 	uint32_t devid;
 	bool is_vf_device;
+	bool has_rcs = false;
 
 	igt_fixture() {
+		struct drm_xe_engine_class_instance *hwe;
+
 		fd = drm_open_driver(DRIVER_XE);
 		devid = intel_get_drm_devid(fd);
 		is_vf_device = intel_is_vf_device(fd);
 		set_bus_addr(fd);
+
+		xe_for_each_engine(fd, hwe)
+			if (hwe->engine_class == DRM_XE_ENGINE_CLASS_RENDER) {
+				has_rcs = true;
+				break;
+			}
+
 		drm_close_driver(fd);
 
 		configfs_fd = igt_configfs_open("xe");
@@ -418,6 +428,7 @@ int igt_main()
 	igt_describe("Validate ctx_restore_post_bb");
 	igt_subtest("ctx-restore-post-bb") {
 		igt_skip_on_f(is_vf_device, "MMIO register readback not possible on VF\n");
+		igt_require_f(has_rcs, "Platform has no render engine\n");
 		configfs_device_fd = create_device_configfs_group(configfs_fd);
 		test_ctx_restore(configfs_device_fd, "post");
 		close_configfs_group(configfs_fd, configfs_device_fd);
@@ -434,6 +445,7 @@ int igt_main()
 	igt_describe("Validate ctx_restore_mid_bb");
 	igt_subtest("ctx-restore-mid-bb") {
 		igt_skip_on_f(is_vf_device, "MMIO register readback not possible on VF\n");
+		igt_require_f(has_rcs, "Platform has no render engine\n");
 		configfs_device_fd = create_device_configfs_group(configfs_fd);
 		test_ctx_restore(configfs_device_fd, "mid");
 		close_configfs_group(configfs_fd, configfs_device_fd);
-- 
2.50.1


             reply	other threads:[~2026-04-15  5:47 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-04-15  6:21 Nitin Gote [this message]
2026-04-15  8:59 ` ✓ i915.CI.BAT: success for tests/intel/xe_configfs: Fix ctx-restore subtests register Patchwork
2026-04-15  9:13 ` ✓ Xe.CI.BAT: " Patchwork
2026-04-15 11:03 ` ✗ Xe.CI.FULL: failure " Patchwork
2026-04-15 12:33 ` ✓ i915.CI.Full: success " Patchwork
2026-04-15 15:00 ` [PATCH] " Gote, Nitin R

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