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Ip=[165.204.84.17]; Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000A6732.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB8814 X-BeenThere: igt-dev@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development mailing list for IGT GPU Tools List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: igt-dev-bounces@lists.freedesktop.org Sender: "igt-dev" Fix spelling and grammar issues in the following tests. amd_dp_dsc.c: - 'Maximumm' -> 'Maximum' - 'outpus' -> 'outputs' - 'horisontal' -> 'horizontal' - 'v_ative' -> 'v_active' amd_hotplug.c: - Capitalize 'return' to 'Return' in function comment - Add missing article 'the' before 'reference image' amd_mem_leak.c: - 'amdpgu' -> 'amdgpu' - 'memroy' -> 'memory' amd_vrr_range.c: - 'Maximumm' -> 'Maximum' - 'more safe margin' -> 'more safety margin' - Add missing article 'a' before 'golden sample' - 'Cannot parsing' -> 'Cannot parse' Assisted-by: GitHubCopilot:claude-sonnet-4.6 Signed-off-by: Alex Hung --- tests/amdgpu/amd_dp_dsc.c | 8 ++++---- tests/amdgpu/amd_hotplug.c | 4 ++-- tests/amdgpu/amd_mem_leak.c | 4 ++-- tests/amdgpu/amd_vrr_range.c | 8 ++++---- 4 files changed, 12 insertions(+), 12 deletions(-) diff --git a/tests/amdgpu/amd_dp_dsc.c b/tests/amdgpu/amd_dp_dsc.c index b84411636..1742c7df4 100644 --- a/tests/amdgpu/amd_dp_dsc.c +++ b/tests/amdgpu/amd_dp_dsc.c @@ -28,7 +28,7 @@ #define NUM_SLICE_SLOTS 4 -/* Maximumm pipes on any AMD ASIC. */ +/* Maximum pipes on any AMD ASIC. */ #define MAX_PIPES 6 /* Common test data. */ @@ -82,7 +82,7 @@ static void test_init(data_t *data) if (!igt_output_is_connected(output)) continue; - /* Ensure that outpus are DP, DSC & FEC capable */ + /* Ensure that outputs are DP, DSC & FEC capable */ if (!(is_dp_fec_supported(data->fd, output->name) && is_dp_dsc_supported(data->fd, output->name))) continue; @@ -236,7 +236,7 @@ static bool update_slice_width(data_t *data, igt_plane_set_fb(data->primary[conn_idx], &ref_fb); igt_display_commit_atomic(&data->display, DRM_MODE_ATOMIC_ALLOW_MODESET, NULL); - igt_info("Forcing slice width: slice width %d num slices horisontal %d\n", slice_width, num_slices[i]); + igt_info("Forcing slice width: slice width %d num slices horizontal %d\n", slice_width, num_slices[i]); act_slice_width = igt_amd_read_dsc_param_slice_width(data->fd, output->name); @@ -293,7 +293,7 @@ static void test_dsc_slice_dimensions_change(data_t *data) h_addressable = data->mode->hdisplay; v_addressable = data->mode->vdisplay; - igt_info("Mode info: v_ative %d h_active %d\n", v_addressable, h_addressable); + igt_info("Mode info: v_active %d h_active %d\n", v_addressable, h_addressable); /* Save pipe's initial DSC state */ dsc_before = igt_amd_read_dsc_clock_status(data->fd, output->name); diff --git a/tests/amdgpu/amd_hotplug.c b/tests/amdgpu/amd_hotplug.c index 83ad55ea0..c54288e90 100644 --- a/tests/amdgpu/amd_hotplug.c +++ b/tests/amdgpu/amd_hotplug.c @@ -122,7 +122,7 @@ static bool is_system_s2idle(void) return strstr(dst, "[s2idle]"); } -/* return the last hw_sleep duration time */ +/* Return the last hw_sleep duration time */ static int get_last_hw_sleep_time(void) { int fd; @@ -189,7 +189,7 @@ static void test_hotplug_basic(data_t *data, bool suspend) "Suspend did not reach hardware sleep state\n"); } - /* Trigger hotplug and confirm reference image is the same. */ + /* Trigger hotplug and confirm the reference image is the same. */ for_each_crtc(&data->display, crtc) { output = data->output[crtc->crtc_index]; if (!output || !igt_output_is_connected(output)) diff --git a/tests/amdgpu/amd_mem_leak.c b/tests/amdgpu/amd_mem_leak.c index 1e55fe785..1d7aa3a2f 100644 --- a/tests/amdgpu/amd_mem_leak.c +++ b/tests/amdgpu/amd_mem_leak.c @@ -45,7 +45,7 @@ static void test_init(data_t *data) { igt_display_t *display = &data->display; - /* It doesn't matter which pipe we choose on amdpgu. */ + /* It doesn't matter which pipe we choose on amdgpu. */ data->crtc = igt_first_crtc(&data->display); igt_display_reset(display); @@ -167,7 +167,7 @@ int igt_main() igt_describe("Test memory leaks after resume from suspend"); igt_subtest("connector-suspend-resume") test_suspend_resume(&data); - igt_describe("Test memroy leaks after connector hotplug"); + igt_describe("Test memory leaks after connector hotplug"); igt_subtest("connector-hotplug") test_hotplug(&data); igt_describe("Test memory leaks with driver unload"); igt_subtest("driver-unload") test_driver_unload(&data); diff --git a/tests/amdgpu/amd_vrr_range.c b/tests/amdgpu/amd_vrr_range.c index cc3323df3..4397f3c15 100644 --- a/tests/amdgpu/amd_vrr_range.c +++ b/tests/amdgpu/amd_vrr_range.c @@ -28,7 +28,7 @@ IGT_TEST_DESCRIPTION("Test EDID parsing and debugfs reporting on Freesync displays"); -/* Maximumm pipes on any AMD ASIC. */ +/* Maximum pipes on any AMD ASIC. */ #define MAX_PIPES 6 #define EDID_SIZE 256 #define EDID_PATH "/sys/class/drm/card%d-%s/edid" @@ -249,7 +249,7 @@ static void trigger_edid_parse(data_t *data, igt_output_t *output, uint32_t test else igt_amd_trigger_hotplug(data->fd, output->name); - /* more safe margin until resume and hotplug is completed */ + /* more safety margin until resume and hotplug is completed */ usleep(1500000); } @@ -325,7 +325,7 @@ static bool find_vrr_range_from_edid(data_t *data, igt_output_t *output) } /* Check if EDID parsing is correctly reporting Freesync capability - * by overriding EDID with ones from golden sample. + * by overriding EDID with ones from a golden sample. */ static void test_freesync_parsing_base(data_t *data, uint32_t test_flags) { @@ -354,7 +354,7 @@ static void test_freesync_parsing_base(data_t *data, uint32_t test_flags) trigger_edid_parse(data, output, test_flags); igt_assert_f(find_vrr_range_from_edid(data, output), - "Cannot parsing VRR range from EDID\n"); + "Cannot parse VRR range from EDID\n"); expected_range.min = data->expected_range.min; expected_range.max = data->expected_range.max; -- 2.43.0