From: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
To: igt-dev@lists.freedesktop.org
Cc: zbigniew.kempczynski@intel.com,
Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
Subject: [PATCH i-g-t] lib/intel_blt: Replace CANONICAL() with xe_canonical_va() for Xe driver
Date: Fri, 8 May 2026 18:05:34 +0530 [thread overview]
Message-ID: <20260508123534.819730-1-dnyaneshwar.bhadane@intel.com> (raw)
The CANONICAL() macro uses a hardcoded bit width (48) for address
canonicalization, which is incorrect on platforms where the GPU virtual
address space differs. Replace CANONICAL() with xe_canonical_va() in the
Xe driver path, which queries the actual va_bits from the kernel via
xe_va_bits().
Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
---
lib/intel_blt.c | 28 +++++++++++++++++++---------
lib/intel_ctx.c | 3 ++-
2 files changed, 21 insertions(+), 10 deletions(-)
diff --git a/lib/intel_blt.c b/lib/intel_blt.c
index 2b59cc7e9..77965e932 100644
--- a/lib/intel_blt.c
+++ b/lib/intel_blt.c
@@ -768,8 +768,13 @@ static void fill_data(struct gen12_block_copy_data *data,
data->dw03.dst_x2 = blt->dst.x2;
data->dw03.dst_y2 = blt->dst.y2;
- data->dw04.dst_address_lo = dst_offset;
- data->dw05.dst_address_hi = dst_offset >> 32;
+ if (blt->driver == INTEL_DRIVER_XE) {
+ data->dw04.dst_address_lo = (uint32_t) (xe_canonical_va(blt->fd, dst_offset));
+ data->dw05.dst_address_hi = (uint32_t) (xe_canonical_va(blt->fd, dst_offset) >> 32);
+ } else {
+ data->dw04.dst_address_lo = dst_offset;
+ data->dw05.dst_address_hi = dst_offset >> 32;
+ }
data->dw06.dst_x_offset = blt->dst.x_offset;
data->dw06.dst_y_offset = blt->dst.y_offset;
@@ -793,8 +798,13 @@ static void fill_data(struct gen12_block_copy_data *data,
data->dw08.src_ctrl_surface_type = blt->src.compression_type;
}
- data->dw09.src_address_lo = src_offset;
- data->dw10.src_address_hi = src_offset >> 32;
+ if (blt->driver == INTEL_DRIVER_XE) {
+ data->dw09.src_address_lo = (uint32_t) (xe_canonical_va(blt->fd, src_offset));
+ data->dw10.src_address_hi = (uint32_t) (xe_canonical_va(blt->fd, src_offset) >> 32);
+ } else {
+ data->dw09.src_address_lo = src_offset;
+ data->dw10.src_address_hi = src_offset >> 32;
+ }
data->dw11.src_x_offset = blt->src.x_offset;
data->dw11.src_y_offset = blt->src.y_offset;
@@ -1091,7 +1101,7 @@ int blt_block_copy(int fd,
emit_blt_block_copy(fd, ahnd, blt, ext, 0, true);
if (blt->driver == INTEL_DRIVER_XE) {
- intel_ctx_xe_exec(ctx, ahnd, CANONICAL(bb_offset));
+ intel_ctx_xe_exec(ctx, ahnd, bb_offset);
} else {
obj[0].offset = CANONICAL(dst_offset);
obj[1].offset = CANONICAL(src_offset);
@@ -1456,7 +1466,7 @@ int blt_ctrl_surf_copy(int fd,
emit_blt_ctrl_surf_copy(fd, ahnd, surf, 0, true);
if (surf->driver == INTEL_DRIVER_XE) {
- intel_ctx_xe_exec(ctx, ahnd, CANONICAL(bb_offset));
+ intel_ctx_xe_exec(ctx, ahnd, bb_offset);
} else {
obj[0].offset = CANONICAL(dst_offset);
obj[1].offset = CANONICAL(src_offset);
@@ -1827,7 +1837,7 @@ int blt_fast_copy(int fd,
emit_blt_fast_copy(fd, ahnd, blt, 0, true);
if (blt->driver == INTEL_DRIVER_XE) {
- intel_ctx_xe_exec(ctx, ahnd, CANONICAL(bb_offset));
+ intel_ctx_xe_exec(ctx, ahnd, bb_offset);
} else {
obj[0].offset = CANONICAL(dst_offset);
obj[1].offset = CANONICAL(src_offset);
@@ -2180,7 +2190,7 @@ int blt_mem_copy(int fd, const intel_ctx_t *ctx,
emit_blt_mem_copy(fd, ahnd, mem, 0, true);
if (mem->driver == INTEL_DRIVER_XE) {
- intel_ctx_xe_exec(ctx, ahnd, CANONICAL(bb_offset));
+ intel_ctx_xe_exec(ctx, ahnd, bb_offset);
} else {
obj[0].offset = CANONICAL(dst_offset);
obj[1].offset = CANONICAL(src_offset);
@@ -2287,7 +2297,7 @@ int blt_mem_set(int fd, const intel_ctx_t *ctx,
emit_blt_mem_set(fd, ahnd, mem, fill_data);
if (mem->driver == INTEL_DRIVER_XE) {
- intel_ctx_xe_exec(ctx, ahnd, CANONICAL(bb_offset));
+ intel_ctx_xe_exec(ctx, ahnd, bb_offset);
} else {
obj[0].offset = CANONICAL(dst_offset);
obj[1].offset = CANONICAL(bb_offset);
diff --git a/lib/intel_ctx.c b/lib/intel_ctx.c
index 30325b906..ca0cd43d9 100644
--- a/lib/intel_ctx.c
+++ b/lib/intel_ctx.c
@@ -11,6 +11,7 @@
#include "intel_ctx.h"
#include "ioctl_wrappers.h"
#include "xe/xe_ioctl.h"
+#include "xe/xe_util.h"
/**
* SECTION:intel_ctx
@@ -430,7 +431,7 @@ int __intel_ctx_xe_exec(const intel_ctx_t *ctx, uint64_t ahnd, uint64_t bb_offse
.exec_queue_id = ctx->exec_queue,
.syncs = (uintptr_t)syncs,
.num_syncs = 2,
- .address = bb_offset,
+ .address = xe_canonical_va(ctx->fd, bb_offset),
.num_batch_buffer = 1,
};
uint32_t sync_in = ctx->sync_in;
--
2.54.0
next reply other threads:[~2026-05-08 12:35 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-08 12:35 Dnyaneshwar Bhadane [this message]
2026-05-08 23:49 ` ✓ i915.CI.BAT: success for lib/intel_blt: Replace CANONICAL() with xe_canonical_va() for Xe driver Patchwork
2026-05-09 0:00 ` ✓ Xe.CI.BAT: " Patchwork
2026-05-09 12:46 ` ✗ Xe.CI.FULL: failure " Patchwork
2026-05-10 0:45 ` ✓ i915.CI.Full: success " Patchwork
2026-05-14 14:20 ` [PATCH i-g-t] " Kamil Konieczny
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