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From: Mohammed Thasleem <mohammed.thasleem@intel.com>
To: igt-dev@lists.freedesktop.org
Cc: Mohammed Thasleem <mohammed.thasleem@intel.com>,
	Jeevan B <jeevan.b@intel.com>
Subject: [PATCH v4 1/2] tests/intel/kms_pm_dc: Add DC5 DPMS suspend/resume validation test
Date: Wed, 10 Jun 2026 12:32:52 +0530	[thread overview]
Message-ID: <20260610070253.25329-2-mohammed.thasleem@intel.com> (raw)
In-Reply-To: <20260610070253.25329-1-mohammed.thasleem@intel.com>

Validate DC5 state entry before and after suspend/resume cycle using DPMS.
Ensures DC5 functionality is preserved across system suspend/resume
operations.

v2: Remove repeated word. (Pranay)
    Remove extra line.
v3: Update test description. (Jeevan)
v4: Add igt_info log during test cycle. (Jeevan)

Signed-off-by: Mohammed Thasleem <mohammed.thasleem@intel.com>
Reviewed-by: Jeevan B <jeevan.b@intel.com>
---
 tests/intel/kms_pm_dc.c | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/tests/intel/kms_pm_dc.c b/tests/intel/kms_pm_dc.c
index 90df8ee37..521521196 100644
--- a/tests/intel/kms_pm_dc.c
+++ b/tests/intel/kms_pm_dc.c
@@ -80,6 +80,9 @@
  *
  * SUBTEST: dc5-pageflip-negative
  * Description: This test validates that DC5 entry should not occur during continuous page-flips
+ *
+ * SUBTEST: dc5-dpms-suspend-resume
+ * Description: This test validates DC5 state entry before and after a suspend/resume cycle using DPMS
  */
 
 #define PWR_DOMAIN_INFO "i915_power_domain_info"
@@ -668,6 +671,18 @@ static void test_dc5_pageflip_negative(data_t *data, int dc_flag)
 	cleanup_dc3co_fbs(data);
 }
 
+static void test_dc5_dpms_suspend_resume(data_t *data, int dc_flag)
+{
+	igt_info("Testing DC5 state before suspend\n");
+	test_dc_state_dpms(data, dc_flag);
+
+	igt_info("Starting suspend/resume cycle\n");
+	igt_system_suspend_autoresume(SUSPEND_STATE_MEM, SUSPEND_TEST_NONE);
+
+	igt_info("Testing DC5 state after resume\n");
+	test_dc_state_dpms(data, dc_flag);
+}
+
 static void kms_poll_state_restore(int sig)
 {
 	int sysfs_fd;
@@ -801,6 +816,11 @@ int igt_main()
 		test_dc9_dpms(&data);
 	}
 
+	igt_describe("This test validates DC5 state entry before and after a "
+		      "suspend/resume cycle using DPMS");
+	igt_subtest("dc5-dpms-suspend-resume")
+		test_dc5_dpms_suspend_resume(&data, IGT_INTEL_CHECK_DC5);
+
 	igt_fixture() {
 		free(data.debugfs_dump);
 		close(data.debugfs_fd);
-- 
2.43.0


  reply	other threads:[~2026-06-10  7:13 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-10  7:02 [PATCH v4 0/2] DC5 DPMS/PSR suspend/resume validation test Mohammed Thasleem
2026-06-10  7:02 ` Mohammed Thasleem [this message]
2026-06-10  7:02 ` [PATCH v4 2/2] tests/intel/kms_pm_dc: Add DC5 PSR " Mohammed Thasleem
2026-06-10 21:22 ` ✓ Xe.CI.BAT: success for DC5 DPMS/PSR " Patchwork
2026-06-10 22:03 ` ✓ i915.CI.BAT: " Patchwork
2026-06-11  3:14 ` ✗ Xe.CI.FULL: failure " Patchwork
2026-06-11  7:03 ` ✓ Xe.CI.BAT: success for DC5 DPMS/PSR suspend/resume validation test (rev2) Patchwork
2026-06-11  7:26 ` ✓ i915.CI.BAT: " Patchwork
2026-06-11 14:36 ` ✗ Xe.CI.FULL: failure " Patchwork
2026-06-11 18:23 ` ✗ i915.CI.Full: failure for DC5 DPMS/PSR suspend/resume validation test Patchwork
2026-06-12  1:57 ` ✗ i915.CI.Full: failure for DC5 DPMS/PSR suspend/resume validation test (rev2) Patchwork
2026-06-14  8:18 ` ✓ Xe.CI.BAT: success for DC5 DPMS/PSR suspend/resume validation test (rev3) Patchwork
2026-06-14  8:42 ` ✓ i915.CI.BAT: " Patchwork
2026-06-14  9:19 ` ✗ Xe.CI.FULL: failure " Patchwork
2026-06-14 10:38 ` ✗ i915.CI.Full: " Patchwork

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