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From: Gajendra Uttamchand <gajendra.uttamchand@intel.com>
To: riana.tauro@intel.com, mallesh.koujalagi@intel.com,
	igt-dev@lists.freedesktop.org
Cc: dwarakanath.ramadeva@intel.com,
	Gajendra Uttamchand <gajendra.uttamchand@intel.com>
Subject: [PATCH i-g-t] tests/intel: ensure stable GT C6 for residency measurement
Date: Tue, 23 Jun 2026 06:36:00 +0000	[thread overview]
Message-ID: <20260623063559.223470-2-gajendra.uttamchand@intel.com> (raw)

Wait for the GT to remain in C6 continuously before taking idle
residency measurements to avoid capturing transient C6 entries caused by
asynchronous register accesses (for example, from in-flight modeset
commits). Add a helper `xe_gt_wait_stable_c6(fd, gt, stable_ms, timeout_ms)`
that polls the GT and requires `stable_ms` of continuous C6 within the
`timeout_ms` window.

Update `test_idle_residency()` to use the new helper and require 300ms
continuous C6 (2s timeout) before starting the residency baseline. This
reduces flaky/residual measurements and makes the test more robust.

Signed-off-by: Gajendra Uttamchand <gajendra.uttamchand@intel.com>
---
 tests/intel/xe_pm_residency.c | 41 ++++++++++++++++++++++++++++++++++-
 1 file changed, 40 insertions(+), 1 deletion(-)

diff --git a/tests/intel/xe_pm_residency.c b/tests/intel/xe_pm_residency.c
index bfae1f844..7a8e11eae 100644
--- a/tests/intel/xe_pm_residency.c
+++ b/tests/intel/xe_pm_residency.c
@@ -212,12 +212,51 @@ static unsigned long read_idle_residency(int fd, int gt)
 	return residency;
 }

+/*
+ * xe_gt_wait_stable_c6 - wait until the GT is stable in C6
+ *
+ * Waits for the GT to stay in C6 continuously for @stable_ms to ensure
+ * genuine idle state before capturing residency baseline. This filters
+ * out brief C6 entries that occur during register accesses from async
+ * operations like modeset commits.
+ *
+ * Returns true if GT stayed in C6 for @stable_ms, false if timeout reached.
+ */
+
+static bool xe_gt_wait_stable_c6(int fd, int gt, int stable_ms, int timeout_ms)
+{
+	int stable = 0;
+	int elapsed = 0;
+	const int step = 10; /* ms */
+
+	while (elapsed < timeout_ms) {
+		usleep(step * USEC_PER_MSEC);
+		elapsed += step;
+		if (xe_gt_is_in_c6(fd, gt)) {
+			stable += step;
+			if (stable >= stable_ms)
+				return true;
+		} else {
+			stable = 0;
+		}
+	}
+	return false;
+}
+
 static void test_idle_residency(int fd, int gt, enum test_type flag)
 {
 	unsigned long elapsed_ms, residency_start, residency_end;
 	struct timespec ts_start, ts_end;

-	igt_assert_f(igt_wait(xe_gt_is_in_c6(fd, gt), 1000, 1), "GT %d not in C6\n", gt);
+	/*
+	 * Wait for stable C6 state before measurement. Previous test cleanup
+	 * can trigger async modeset commits that access GT registers for
+	 * extended periods, causing brief C6 entries. Requiring 300ms continuous
+	 * C6 ensures any in-flight operations complete first.
+	 */
+
+	igt_assert_f(xe_gt_wait_stable_c6(fd, gt, 300, 2000),
+		     "GT %d did not reach stable C6 within 2s\n", gt);

 	if (flag == TEST_S2IDLE) {
 		clock_gettime(CLOCK_BOOTTIME, &ts_start);
--
2.43.0


             reply	other threads:[~2026-06-23  6:36 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-23  6:36 Gajendra Uttamchand [this message]
2026-06-23  7:07 ` ✓ Xe.CI.BAT: success for tests/intel: ensure stable GT C6 for residency measurement Patchwork
2026-06-23  7:24 ` ✓ i915.CI.BAT: " Patchwork
2026-06-23  9:05 ` ✓ Xe.CI.FULL: " Patchwork
2026-06-23  9:10 ` [PATCH i-g-t] " Anirban, Sk
2026-06-23 14:14 ` ✗ i915.CI.Full: failure for " Patchwork

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