[PATCH i-g-t] lib/i915/fbc: xe3_lpd+ update the plane size checks for FBC support

[Vinod Govindapillai <vinod.govindapillai@intel.com>]

From xe3_lpd+ there is no restriction on the plane width to
enable FBC. The restriction on the number of lines still holds.
Update the plane size check function accordingly so that FBC
tests dont get skipped for valid plane sizes.

Bspec: 69560
Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
---
 lib/i915/intel_fbc.c | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/lib/i915/intel_fbc.c b/lib/i915/intel_fbc.c
index b8c714d43..9444a2088 100644
--- a/lib/i915/intel_fbc.c
+++ b/lib/i915/intel_fbc.c
@@ -127,7 +127,15 @@ static void intel_fbc_max_plane_size(igt_display_t *display, uint32_t *width, ui
 	const struct intel_device_info *info = intel_get_device_info(dev_id);
 	int ver = info->graphics_ver;
 
-	if (ver >= 10) {
+	if (ver >= 20) {
+		/*
+		 * No restriction on horizontal size. Assume the callee will
+		 * limit the width within the maximum allowed resolution of
+		 * the platform being validated
+		 */
+		*width = UINT32_MAX;
+		*height = 4096;
+	} else if (ver >= 10) {
 		*width = 5120;
 		*height = 4096;
 	} else if (ver >= 8 || IS_HASWELL(fd)) {
-- 
2.43.0