From: "Zbigniew Kempczyński" <zbigniew.kempczynski@intel.com>
To: igt-dev@lists.freedesktop.org
Cc: "Zbigniew Kempczyński" <zbigniew.kempczynski@intel.com>,
"Matt Roper" <matthew.d.roper@intel.com>,
"Jan Maslak" <jan.maslak@intel.com>
Subject: [PATCH i-g-t] lib/rendercopy_gen9: Bump up URB size
Date: Wed, 22 Jul 2026 08:24:59 +0200 [thread overview]
Message-ID: <20260722062458.1250817-2-zbigniew.kempczynski@intel.com> (raw)
According to documentation bump VS number of URB entries to cover whole
Xe3P family.
BSpec: 56268
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Jan Maslak <jan.maslak@intel.com>
---
lib/rendercopy_gen9.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/lib/rendercopy_gen9.c b/lib/rendercopy_gen9.c
index 31913badba..2f22084426 100644
--- a/lib/rendercopy_gen9.c
+++ b/lib/rendercopy_gen9.c
@@ -833,7 +833,7 @@ gen9_emit_state_base_address(struct intel_bb *ibb) {
static void
gen7_emit_urb(struct intel_bb *ibb) {
/* XXX: Min valid values from mesa */
- const int vs_entries = intel_gen(ibb->devid) >= 35 ? 128 : 64;
+ const int vs_entries = intel_gen(ibb->devid) >= 35 ? 160 : 64;
const int vs_size = 2;
const int vs_start = 4;
--
2.54.0
next reply other threads:[~2026-07-22 6:25 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-22 6:24 Zbigniew Kempczyński [this message]
2026-07-22 14:52 ` ✓ Xe.CI.BAT: success for lib/rendercopy_gen9: Bump up URB size Patchwork
2026-07-22 15:06 ` ✓ i915.CI.BAT: " Patchwork
2026-07-23 5:00 ` ✗ Xe.CI.FULL: failure " Patchwork
2026-07-24 5:59 ` Zbigniew Kempczyński
2026-07-23 14:01 ` ✗ i915.CI.Full: " Patchwork
2026-07-24 6:00 ` Zbigniew Kempczyński
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